drivers/clk/mediatek/clk-mt2701.c

524

MUX_GATE(CLK_TOP_SCP_SEL, "scp_sel", scp_parents,

drivers/clk/mediatek/clk-mt6735-topckgen.c

354

MUX_GATE_CLR_SET_UPD(CLK_TOP_SCP_SEL, "scp_sel", scp_sel_parents, CLK_CFG_4, CLK_CFG_4_SET, CLK_CFG_4_CLR, 24, 2, 31, 0, 0),

drivers/clk/mediatek/clk-mt6765.c

378

MUX_GATE_CLR_SET_UPD(CLK_TOP_SCP_SEL, "scp_sel", scp_parents, CLK_CFG_0,

drivers/clk/mediatek/clk-mt6795-topckgen.c

483

TOP_MUX_GATE(CLK_TOP_SCP_SEL, "scp_sel", scp_parents, 0x90, 8, 3, 15, 0),

drivers/clk/mediatek/clk-mt7622.c

431

MUX_GATE(CLK_TOP_SCP_SEL, "scp_sel", ddrphycfg_parents,

drivers/clk/mediatek/clk-mt7629.c

504

MUX_GATE(CLK_TOP_SCP_SEL, "scp_sel", scp_parents,

drivers/clk/mediatek/clk-mt8173-topckgen.c

568

MUX_GATE(CLK_TOP_SCP_SEL, "scp_sel", scp_parents, 0x0090, 8, 3, 15),

drivers/clk/mediatek/clk-mt8192.c

553

MUX_GATE_CLR_SET_UPD(CLK_TOP_SCP_SEL, "scp_sel",

drivers/clk/mediatek/clk-mt8365.c

416

MUX_GATE_CLR_SET_UPD(CLK_TOP_SCP_SEL, "scp_sel", scp_parents, 0x040,