mmTPC3_QM_GLBL_CFG1
WREG32(mmTPC3_QM_GLBL_CFG1, 0x1F << TPC0_QM_GLBL_CFG1_CP_STOP_SHIFT);
mask |= 1U << ((mmTPC3_QM_GLBL_CFG1 & 0x7F) >> 2);
mmTPC3_QM_GLBL_CFG1,
mask |= 1 << ((mmTPC3_QM_GLBL_CFG1 & 0x7F) >> 2);