mmSTM_STMTCSR_OFFSET
WREG32(base_reg + mmSTM_STMTCSR_OFFSET, 0x80004);
RREG32(base_reg + mmSTM_STMTCSR_OFFSET);
WREG32(base_reg + mmSTM_STMTCSR_OFFSET, 0x27 | (input->id << 16));
WREG32(base_reg + mmSTM_STMTCSR_OFFSET, 4);
rc = gaudi2_coresight_timeout(hdev, base_reg + mmSTM_STMTCSR_OFFSET, 23, false);
WREG32(base_reg + mmSTM_STMTCSR_OFFSET, 4);