drivers/gpu/drm/amd/amdgpu/cik.c

1052

{mmSDMA0_STATUS_REG + SDMA0_REGISTER_OFFSET},

drivers/gpu/drm/amd/amdgpu/cik.c

1053

{mmSDMA0_STATUS_REG + SDMA1_REGISTER_OFFSET},

drivers/gpu/drm/amd/amdgpu/nv.c

342

{ SOC15_REG_ENTRY(SDMA0, 0, mmSDMA0_STATUS_REG)},

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

2024

u32 tmp = RREG32_SDMA(i, mmSDMA0_STATUS_REG);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

2041

sdma[j] = RREG32_SDMA(j, mmSDMA0_STATUS_REG);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

76

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_STATUS_REG),

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

1502

u32 tmp = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_STATUS_REG));

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

1518

sdma0 = RREG32(sdma_v5_0_get_reg_offset(adev, 0, mmSDMA0_STATUS_REG));

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

1519

sdma1 = RREG32(sdma_v5_0_get_reg_offset(adev, 1, mmSDMA0_STATUS_REG));

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

63

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_STATUS_REG),

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

1415

u32 tmp = RREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_STATUS_REG));

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

1431

sdma0 = RREG32(sdma_v5_2_get_reg_offset(adev, 0, mmSDMA0_STATUS_REG));

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

1432

sdma1 = RREG32(sdma_v5_2_get_reg_offset(adev, 1, mmSDMA0_STATUS_REG));

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

1433

sdma2 = RREG32(sdma_v5_2_get_reg_offset(adev, 2, mmSDMA0_STATUS_REG));

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

1434

sdma3 = RREG32(sdma_v5_2_get_reg_offset(adev, 3, mmSDMA0_STATUS_REG));

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

64

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_STATUS_REG),

drivers/gpu/drm/amd/amdgpu/soc15.c

388

{ SOC15_REG_ENTRY(SDMA0, 0, mmSDMA0_STATUS_REG)},

drivers/gpu/drm/amd/amdgpu/vi.c

675

{mmSDMA0_STATUS_REG + SDMA0_REGISTER_OFFSET},

drivers/gpu/drm/amd/amdgpu/vi.c

676

{mmSDMA0_STATUS_REG + SDMA1_REGISTER_OFFSET},