Symbol: mmSDMA0_PHASE1_QUANTUM
drivers/gpu/drm/amd/amdgpu/cik_sdma.c
378
WREG32(mmSDMA0_PHASE1_QUANTUM + sdma_offsets[i],
drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
588
WREG32(mmSDMA0_PHASE1_QUANTUM + sdma_offsets[i],
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
1016
WREG32_SDMA(i, mmSDMA0_PHASE1_QUANTUM, phase_quantum);
drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
637
WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_PHASE1_QUANTUM),
drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
481
WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_PHASE1_QUANTUM),