drivers/gpu/drm/amd/amdgpu/cik_sdma.c

463

WREG32(mmSDMA0_GFX_RB_RPTR + sdma_offsets[i], 0);

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

438

WREG32(mmSDMA0_GFX_RB_RPTR + sdma_offsets[i], 0);

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

679

WREG32(mmSDMA0_GFX_RB_RPTR + sdma_offsets[i], 0);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1102

WREG32_SDMA(i, mmSDMA0_GFX_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

90

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_RB_RPTR),

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

717

WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_RPTR), lower_32_bits(ring->wptr << 2));

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

722

WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_RPTR), 0);

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

77

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_RB_RPTR),

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

566

WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_RPTR), lower_32_bits(ring->wptr << 2));

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

571

WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_RPTR), 0);

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

78

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_RB_RPTR),