Symbol: mmRLC_CP_SCHEDULERS_Sienna_Cichlid
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
6731
tmp = RREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS_Sienna_Cichlid);
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
6734
WREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS_Sienna_Cichlid, tmp | 0x80);