drivers/accel/habanalabs/gaudi2/gaudi2.c

1443

[GAUDI2_QUEUE_ID_PDMA_0_0] = mmPDMA0_QM_BASE,

drivers/accel/habanalabs/gaudi2/gaudi2.c

1444

[GAUDI2_QUEUE_ID_PDMA_0_1] = mmPDMA0_QM_BASE,

drivers/accel/habanalabs/gaudi2/gaudi2.c

1445

[GAUDI2_QUEUE_ID_PDMA_0_2] = mmPDMA0_QM_BASE,

drivers/accel/habanalabs/gaudi2/gaudi2.c

1446

[GAUDI2_QUEUE_ID_PDMA_0_3] = mmPDMA0_QM_BASE,

drivers/accel/habanalabs/gaudi2/gaudi2.c

4266

gaudi2_stop_qman_common(hdev, mmPDMA0_QM_BASE);

drivers/accel/habanalabs/gaudi2/gaudi2.c

4465

gaudi2_disable_qman_common(hdev, mmPDMA0_QM_BASE);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8870

qman_base = mmPDMA0_QM_BASE + index * PDMA_OFFSET;

drivers/accel/habanalabs/gaudi2/gaudi2.c

8989

qman_base = mmPDMA0_QM_BASE;

drivers/accel/habanalabs/gaudi2/gaudi2_security.c

112

mmPDMA0_QM_BASE,

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

177

#define PDMA_OFFSET (mmPDMA1_QM_BASE - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

209

#define QM_PQ_BASE_LO_0_OFFSET (mmPDMA0_QM_PQ_BASE_LO_0 - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

210

#define QM_PQ_BASE_HI_0_OFFSET (mmPDMA0_QM_PQ_BASE_HI_0 - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

211

#define QM_PQ_SIZE_0_OFFSET (mmPDMA0_QM_PQ_SIZE_0 - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

212

#define QM_PQ_PI_0_OFFSET (mmPDMA0_QM_PQ_PI_0 - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

213

#define QM_PQ_CI_0_OFFSET (mmPDMA0_QM_PQ_CI_0 - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

214

#define QM_CP_FENCE0_CNT_0_OFFSET (mmPDMA0_QM_CP_FENCE0_CNT_0 - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

216

#define QM_CP_MSG_BASE0_ADDR_LO_0_OFFSET (mmPDMA0_QM_CP_MSG_BASE0_ADDR_LO_0 - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

217

#define QM_CP_MSG_BASE0_ADDR_HI_0_OFFSET (mmPDMA0_QM_CP_MSG_BASE0_ADDR_HI_0 - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

218

#define QM_CP_MSG_BASE1_ADDR_LO_0_OFFSET (mmPDMA0_QM_CP_MSG_BASE1_ADDR_LO_0 - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

219

#define QM_CP_MSG_BASE1_ADDR_HI_0_OFFSET (mmPDMA0_QM_CP_MSG_BASE1_ADDR_HI_0 - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

221

#define QM_CP_CFG_OFFSET (mmPDMA0_QM_CP_CFG - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

222

#define QM_PQC_HBW_BASE_LO_0_OFFSET (mmPDMA0_QM_PQC_HBW_BASE_LO_0 - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

223

#define QM_PQC_HBW_BASE_HI_0_OFFSET (mmPDMA0_QM_PQC_HBW_BASE_HI_0 - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

224

#define QM_PQC_SIZE_0_OFFSET (mmPDMA0_QM_PQC_SIZE_0 - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

225

#define QM_PQC_PI_0_OFFSET (mmPDMA0_QM_PQC_PI_0 - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

226

#define QM_PQC_LBW_WDATA_0_OFFSET (mmPDMA0_QM_PQC_LBW_WDATA_0 - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

227

#define QM_PQC_LBW_BASE_LO_0_OFFSET (mmPDMA0_QM_PQC_LBW_BASE_LO_0 - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

228

#define QM_PQC_LBW_BASE_HI_0_OFFSET (mmPDMA0_QM_PQC_LBW_BASE_HI_0 - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

229

#define QM_GLBL_ERR_ADDR_LO_OFFSET (mmPDMA0_QM_GLBL_ERR_ADDR_LO - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

230

#define QM_PQC_CFG_OFFSET (mmPDMA0_QM_PQC_CFG - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

231

#define QM_ARB_CFG_0_OFFSET (mmPDMA0_QM_ARB_CFG_0 - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

232

#define QM_GLBL_CFG0_OFFSET (mmPDMA0_QM_GLBL_CFG0 - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

233

#define QM_GLBL_CFG1_OFFSET (mmPDMA0_QM_GLBL_CFG1 - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

234

#define QM_GLBL_CFG2_OFFSET (mmPDMA0_QM_GLBL_CFG2 - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

235

#define QM_GLBL_PROT_OFFSET (mmPDMA0_QM_GLBL_PROT - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

236

#define QM_GLBL_ERR_CFG_OFFSET (mmPDMA0_QM_GLBL_ERR_CFG - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

237

#define QM_GLBL_ERR_CFG1_OFFSET (mmPDMA0_QM_GLBL_ERR_CFG1 - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

238

#define QM_GLBL_ERR_ADDR_HI_OFFSET (mmPDMA0_QM_GLBL_ERR_ADDR_HI - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

239

#define QM_GLBL_ERR_WDATA_OFFSET (mmPDMA0_QM_GLBL_ERR_WDATA - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

240

#define QM_ARB_ERR_MSG_EN_OFFSET (mmPDMA0_QM_ARB_ERR_MSG_EN - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

241

#define QM_ARB_SLV_CHOISE_WDT_OFFSET (mmPDMA0_QM_ARB_SLV_CHOICE_WDT - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

242

#define QM_FENCE2_OFFSET (mmPDMA0_QM_CP_FENCE2_RDATA_0 - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

243

#define QM_SEI_STATUS_OFFSET (mmPDMA0_QM_SEI_STATUS - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

245

#define QM_CQ_TSIZE_STS_4_OFFSET (mmPDMA0_QM_CQ_TSIZE_STS_4 - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

246

#define QM_CQ_PTR_LO_STS_4_OFFSET (mmPDMA0_QM_CQ_PTR_LO_STS_4 - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

247

#define QM_CQ_PTR_HI_STS_4_OFFSET (mmPDMA0_QM_CQ_PTR_HI_STS_4 - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

249

#define QM_ARC_CQ_TSIZE_STS_OFFSET (mmPDMA0_QM_ARC_CQ_TSIZE_STS - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

250

#define QM_ARC_CQ_PTR_LO_STS_OFFSET (mmPDMA0_QM_ARC_CQ_PTR_LO_STS - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

251

#define QM_ARC_CQ_PTR_HI_STS_OFFSET (mmPDMA0_QM_ARC_CQ_PTR_HI_STS - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

253

#define QM_CP_STS_4_OFFSET (mmPDMA0_QM_CP_STS_4 - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

254

#define QM_CP_CURRENT_INST_LO_4_OFFSET (mmPDMA0_QM_CP_CURRENT_INST_LO_4 - mmPDMA0_QM_BASE)

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

255

#define QM_CP_CURRENT_INST_HI_4_OFFSET (mmPDMA0_QM_CP_CURRENT_INST_HI_4 - mmPDMA0_QM_BASE)