Symbol: CLK_UART1
drivers/clk/actions/owl-s500.c
490
[CLK_UART1] = &uart1_clk.common.hw,
drivers/clk/actions/owl-s700.c
529
[CLK_UART1] = &clk_uart1.common.hw,
drivers/clk/actions/owl-s900.c
677
[CLK_UART1] = &uart1_clk.common.hw,
drivers/clk/pistachio/clk-pistachio.c
36
GATE(CLK_UART1, "uart1", "uart1_div", 0x104, 17),
drivers/clk/renesas/r9a06g032-clocks.c
662
D_UGATE(CLK_UART1, "clk_uart1", UART_GROUP_012, 0,
drivers/clk/rockchip/clk-rk3528.c
212
MUX(CLK_UART1, "clk_uart1", sclk_uart1_src_p, CLK_SET_RATE_PARENT,
drivers/clk/rockchip/clk-rk3562.c
167
MUX(CLK_UART1, "clk_uart1", clk_uart1_p, CLK_SET_RATE_PARENT,
drivers/clk/rockchip/clk-rk3588.c
609
MUX(CLK_UART1, "clk_uart1", clk_uart1_p, CLK_SET_RATE_PARENT,
drivers/clk/samsung/clk-exynos3250.c
667
GATE(CLK_UART1, "uart1", "div_aclk_100", GATE_IP_PERIL, 1, 0, 0),
drivers/clk/samsung/clk-exynos4.c
854
GATE(CLK_UART1, "uart1", "aclk100", GATE_IP_PERIL, 1,
drivers/clk/samsung/clk-exynos5250.c
578
GATE(CLK_UART1, "uart1", "div_aclk66", GATE_IP_PERIC, 1, 0, 0),
drivers/clk/samsung/clk-exynos5410.c
199
GATE(CLK_UART1, "uart1", "aclk66", GATE_IP_PERIC, 1, 0, 0),
drivers/clk/samsung/clk-exynos5420.c
1057
GATE(CLK_UART1, "uart1", "mout_user_aclk66_peric",
drivers/clk/samsung/clk-s5pv210.c
574
GATE(CLK_UART1, "uart1", "dout_pclkp", CLK_GATE_IP3, 18, 0, 0),
drivers/clk/sophgo/clk-cv1800.c
1108
[CLK_UART1] = &clk_uart1.common.hw,
drivers/clk/sophgo/clk-cv1800.c
1339
[CLK_UART1] = &clk_uart1.common.hw,
drivers/clk/sprd/sc9860-clk.c
468
[CLK_UART1] = &uart1_clk.common.hw,
drivers/clk/sprd/ums512-clk.c
1090
[CLK_UART1] = &uart1_clk.common.hw,