drivers/gpu/drm/amd/pm/powerplay/smumgr/smu10_smumgr.c

103

WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0);

drivers/gpu/drm/amd/pm/powerplay/smumgr/smu10_smumgr.c

54

reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_90);

drivers/gpu/drm/amd/pm/powerplay/smumgr/smu10_smumgr.c

59

return RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90);

drivers/gpu/drm/amd/pm/powerplay/smumgr/smu10_smumgr.c

85

WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0);

drivers/gpu/drm/amd/pm/powerplay/smumgr/smu9_smumgr.c

123

WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0);

drivers/gpu/drm/amd/pm/powerplay/smumgr/smu9_smumgr.c

153

WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0);

drivers/gpu/drm/amd/pm/powerplay/smumgr/smu9_smumgr.c

76

reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_90);

drivers/gpu/drm/amd/pm/powerplay/smumgr/smu9_smumgr.c

83

return RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90);

drivers/gpu/drm/amd/pm/powerplay/smumgr/vega20_smumgr.c

112

WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0);

drivers/gpu/drm/amd/pm/powerplay/smumgr/vega20_smumgr.c

138

WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0);

drivers/gpu/drm/amd/pm/powerplay/smumgr/vega20_smumgr.c

75

reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_90);

drivers/gpu/drm/amd/pm/powerplay/smumgr/vega20_smumgr.c

80

return RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90);

drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c

2180

ctl->config.resp_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_90);

drivers/gpu/drm/amd/pm/swsmu/smu12/smu_v12_0.c

417

ctl->config.resp_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_90);

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c

2363

ctl->config.resp_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_90);

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c

1135

ctl->config.resp_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_90);

drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_0_ppt.c

1743

ctl->config.resp_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_90);