drivers/gpu/drm/amd/pm/powerplay/smumgr/smu10_smumgr.c

105

WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_82, parameter);

drivers/gpu/drm/amd/pm/powerplay/smumgr/smu10_smumgr.c

76

return RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_82);

drivers/gpu/drm/amd/pm/powerplay/smumgr/smu9_smumgr.c

154

WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_82, parameter);

drivers/gpu/drm/amd/pm/powerplay/smumgr/smu9_smumgr.c

173

return RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_82);

drivers/gpu/drm/amd/pm/powerplay/smumgr/vega20_smumgr.c

140

WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_82, parameter);

drivers/gpu/drm/amd/pm/powerplay/smumgr/vega20_smumgr.c

155

return RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_82);

drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c

2181

ctl->config.arg_regs[0] = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_82);

drivers/gpu/drm/amd/pm/swsmu/smu12/smu_v12_0.c

418

ctl->config.arg_regs[0] = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_82);

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c

2364

ctl->config.arg_regs[0] = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_82);

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c

1136

ctl->config.arg_regs[0] = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_82);

drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_0_ppt.c

1744

ctl->config.arg_regs[0] = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_82);