mmMME0_QM_GLBL_CFG1
WREG32(mmMME0_QM_GLBL_CFG1 + mme_offset, 0);
WREG32(mmMME0_QM_GLBL_CFG1, 0x1F << MME0_QM_GLBL_CFG1_CP_STOP_SHIFT);
mask |= 1U << ((mmMME0_QM_GLBL_CFG1 & 0x7F) >> 2);