mmDMA_QM_3_GLBL_CFG1
mmDMA_QM_3_GLBL_CFG1,
WREG32(mmDMA_QM_3_GLBL_CFG1, 1 << DMA_QM_3_GLBL_CFG1_DMA_STOP_SHIFT);
mask |= 1 << ((mmDMA_QM_3_GLBL_CFG1 & 0x7F) >> 2);