Symbol: mmDCORE0_VDEC0_BRDG_CTRL_BASE
drivers/accel/habanalabs/gaudi2/gaudi2.c
7918
u32 offset = (mmDCORE0_VDEC1_BRDG_CTRL_BASE - mmDCORE0_VDEC0_BRDG_CTRL_BASE) *
drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h
433
#define BRDG_CTRL_BLOCK_OFFSET (mmDCORE0_VDEC0_BRDG_CTRL_BASE - mmDCORE0_DEC0_CMD_BASE)
drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h
439
(mmDCORE0_VDEC0_BRDG_CTRL_NRM_MSIX_LBW_AWADDR - mmDCORE0_VDEC0_BRDG_CTRL_BASE)
drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h
442
(mmDCORE0_VDEC0_BRDG_CTRL_NRM_MSIX_LBW_WDATA - mmDCORE0_VDEC0_BRDG_CTRL_BASE)
drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h
445
(mmDCORE0_VDEC0_BRDG_CTRL_ABNRM_MSIX_LBW_AWADDR - mmDCORE0_VDEC0_BRDG_CTRL_BASE)
drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h
448
(mmDCORE0_VDEC0_BRDG_CTRL_ABNRM_MSIX_LBW_WDATA - mmDCORE0_VDEC0_BRDG_CTRL_BASE)