drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

420

tmp = RREG32(mmCRTC_CONTROL + crtc_offsets[i]);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

491

crtc_enabled = REG_GET_FIELD(RREG32(mmCRTC_CONTROL + crtc_offsets[i]),

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

495

tmp = RREG32(mmCRTC_CONTROL + crtc_offsets[i]);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

497

WREG32(mmCRTC_CONTROL + crtc_offsets[i], tmp);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

388

if (RREG32(mmCRTC_CONTROL + crtc_offsets[i]) & CRTC_CONTROL__CRTC_MASTER_EN_MASK) {

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

443

crtc_enabled = RREG32(mmCRTC_CONTROL + crtc_offsets[i]) &

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

447

tmp = RREG32(mmCRTC_CONTROL + crtc_offsets[i]);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

449

WREG32(mmCRTC_CONTROL + crtc_offsets[i], tmp);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

372

if (RREG32(mmCRTC_CONTROL + crtc_offsets[i]) & CRTC_CONTROL__CRTC_MASTER_EN_MASK) {

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

449

crtc_enabled = REG_GET_FIELD(RREG32(mmCRTC_CONTROL + crtc_offsets[i]),

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

453

tmp = RREG32(mmCRTC_CONTROL + crtc_offsets[i]);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

455

WREG32(mmCRTC_CONTROL + crtc_offsets[i], tmp);

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

111

uint32_t address = CRTC_REG(mmCRTC_CONTROL);

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

2109

addr = CRTC_REG(mmCRTC_CONTROL);

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

595

uint32_t address = mmCRTC_CONTROL;

drivers/gpu/drm/amd/display/dc/dce60/dce60_timing_generator.c

133

uint32_t addr2 = CRTC_REG(mmCRTC_CONTROL);

drivers/gpu/drm/amd/display/dc/dce60/dce60_timing_generator.c

186

addr = CRTC_REG(mmCRTC_CONTROL);

drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c

111

.crtc = (mmCRTC0_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c

115

.crtc = (mmCRTC1_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c

119

.crtc = (mmCRTC2_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c

123

.crtc = (mmCRTC3_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c

127

.crtc = (mmCRTC4_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c

131

.crtc = (mmCRTC5_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

119

.crtc = (mmCRTC0_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

123

.crtc = (mmCRTC1_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

127

.crtc = (mmCRTC2_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

131

.crtc = (mmCRTC3_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

135

.crtc = (mmCRTC4_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

139

.crtc = (mmCRTC5_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c

120

.crtc = (mmCRTC0_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c

124

.crtc = (mmCRTC1_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c

128

.crtc = (mmCRTC2_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c

132

.crtc = (mmCRTC3_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c

136

.crtc = (mmCRTC4_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c

140

.crtc = (mmCRTC5_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c

116

.crtc = (mmCRTC0_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c

122

.crtc = (mmCRTC1_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c

128

.crtc = (mmCRTC2_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c

134

.crtc = (mmCRTC3_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c

140

.crtc = (mmCRTC4_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c

146

.crtc = (mmCRTC5_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c

115

.crtc = (mmCRTC0_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c

121

.crtc = (mmCRTC1_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c

127

.crtc = (mmCRTC2_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c

133

.crtc = (mmCRTC3_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c

139

.crtc = (mmCRTC4_CRTC_CONTROL - mmCRTC_CONTROL),

drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c

145

.crtc = (mmCRTC5_CRTC_CONTROL - mmCRTC_CONTROL),