Symbol: mmCP_MQD_BASE_ADDR
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c
224
hqd_base = SOC15_REG_OFFSET(GC, 0, mmCP_MQD_BASE_ADDR);
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c
361
for (reg = SOC15_REG_OFFSET(GC, 0, mmCP_MQD_BASE_ADDR);
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c
210
hqd_base = SOC15_REG_OFFSET(GC, 0, mmCP_MQD_BASE_ADDR);
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c
347
for (reg = SOC15_REG_OFFSET(GC, 0, mmCP_MQD_BASE_ADDR);
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c
176
for (reg = mmCP_MQD_BASE_ADDR; reg <= mmCP_MQD_CONTROL; reg++)
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c
177
WREG32(reg, mqd_hqd[reg - mmCP_MQD_BASE_ADDR]);
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c
228
for (reg = mmCP_MQD_BASE_ADDR; reg <= mmCP_MQD_CONTROL; reg++)
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c
186
for (reg = mmCP_MQD_BASE_ADDR; reg <= mmCP_HQD_EOP_CONTROL; reg++)
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c
187
WREG32(reg, mqd_hqd[reg - mmCP_MQD_BASE_ADDR]);
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c
201
WREG32(reg, mqd_hqd[reg - mmCP_MQD_BASE_ADDR]);
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c
252
for (reg = mmCP_MQD_BASE_ADDR; reg <= mmCP_HQD_EOP_DONES; reg++)
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
238
hqd_base = SOC15_REG_OFFSET(GC, GET_INST(GC, inst), mmCP_MQD_BASE_ADDR);
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
372
for (reg = SOC15_REG_OFFSET(GC, GET_INST(GC, inst), mmCP_MQD_BASE_ADDR);
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
7068
WREG32_SOC15(GC, 0, mmCP_MQD_BASE_ADDR,
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
2951
WREG32(mqd_reg, mqd_data[mqd_reg - mmCP_MQD_BASE_ADDR]);
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
2954
for (mqd_reg = mmCP_MQD_BASE_ADDR; mqd_reg <= mmCP_HQD_ACTIVE; mqd_reg++)
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
2955
WREG32(mqd_reg, mqd_data[mqd_reg - mmCP_MQD_BASE_ADDR]);
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
4560
WREG32(mqd_reg, mqd_data[mqd_reg - mmCP_MQD_BASE_ADDR]);
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
4574
WREG32(mqd_reg, mqd_data[mqd_reg - mmCP_MQD_BASE_ADDR]);
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
4577
for (mqd_reg = mmCP_MQD_BASE_ADDR; mqd_reg <= mmCP_HQD_ACTIVE; mqd_reg++)
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
4578
WREG32(mqd_reg, mqd_data[mqd_reg - mmCP_MQD_BASE_ADDR]);
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
3722
WREG32_SOC15_RLC(GC, 0, mmCP_MQD_BASE_ADDR,
drivers/gpu/drm/amd/pm/powerplay/inc/polaris10_pwrvirus.h
1505
{ 0x54116f00, mmCP_MQD_BASE_ADDR },
drivers/gpu/drm/amd/pm/powerplay/inc/polaris10_pwrvirus.h
1515
{ 0x54117300, mmCP_MQD_BASE_ADDR },
drivers/gpu/drm/amd/pm/powerplay/inc/polaris10_pwrvirus.h
1525
{ 0x54117700, mmCP_MQD_BASE_ADDR },
drivers/gpu/drm/amd/pm/powerplay/inc/polaris10_pwrvirus.h
1535
{ 0x54117b00, mmCP_MQD_BASE_ADDR },