Symbol: mmCP_ME1_PIPE0_INT_CNTL
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
5407
return SOC15_REG_OFFSET(GC, 0, mmCP_ME1_PIPE0_INT_CNTL);
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
9098
mec_int_cntl_reg = SOC15_REG_OFFSET(GC, 0, mmCP_ME1_PIPE0_INT_CNTL);
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
9411
target = SOC15_REG_OFFSET(GC, 0, mmCP_ME1_PIPE0_INT_CNTL);
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
4652
mec_int_cntl_reg = mmCP_ME1_PIPE0_INT_CNTL;
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
6407
mec_int_cntl_reg = mmCP_ME1_PIPE0_INT_CNTL;
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
5984
mec_int_cntl_reg = SOC15_REG_OFFSET(GC, 0, mmCP_ME1_PIPE0_INT_CNTL);
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
6035
return SOC15_REG_OFFSET(GC, 0, mmCP_ME1_PIPE0_INT_CNTL);