mmCP_CPC_IC_BASE_LO
WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_LO,
WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_LO, adev->gfx.mec.mec_fw_gpu_addr &
WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_LO,
{ 0x540ff000, mmCP_CPC_IC_BASE_LO },
cgs_write_register(hwmgr->device, mmCP_CPC_IC_BASE_LO, reg_data);