drivers/irqchip/irq-meson-gpio.c

279

meson_gpio_irq_update_bits(ctl, reg_offset,

drivers/irqchip/irq-meson-gpio.c

294

meson_gpio_irq_update_bits(ctl, reg_offset,

drivers/irqchip/irq-meson-gpio.c

302

meson_gpio_irq_update_bits(ctl, REG_EDGE_POL, BIT(31), BIT(31));

drivers/irqchip/irq-meson-gpio.c

400

meson_gpio_irq_update_bits(ctl, REG_EDGE_POL,

drivers/irqchip/irq-meson-gpio.c

434

meson_gpio_irq_update_bits(ctl, params->edge_pol_reg, BIT(idx), 0);

drivers/irqchip/irq-meson-gpio.c

438

meson_gpio_irq_update_bits(ctl, params->edge_pol_reg, val, val);

drivers/irqchip/irq-meson-gpio.c

445

meson_gpio_irq_update_bits(ctl, REG_A9_AO_POL, BIT(idx), val);

drivers/irqchip/irq-meson-gpio.c

450

meson_gpio_irq_update_bits(ctl, REG_A9_AO_EDGE, BIT(idx), val);

drivers/irqchip/irq-meson-gpio.c

481

meson_gpio_irq_update_bits(ctl, params->edge_pol_reg, BIT(idx), 0);

drivers/irqchip/irq-meson-gpio.c

485

meson_gpio_irq_update_bits(ctl, params->edge_pol_reg, val, val);

drivers/irqchip/irq-meson-gpio.c

495

meson_gpio_irq_update_bits(ctl, REG_EDGE_POL, BIT(idx) | BIT(12 + idx), val);