Symbol: CLK_TOP_APLL2_SEL
drivers/clk/mediatek/clk-mt2712.c
712
MUX_GATE(CLK_TOP_APLL2_SEL, "apll2_sel", apll_parents, 0x500, 16, 4, 23),
drivers/clk/mediatek/clk-mt7622.c
466
MUX(CLK_TOP_APLL2_SEL, "apll2_ck_sel", apll1_ck_parents,