Symbol: CLK_TOP_APLL2_DIV4
drivers/clk/mediatek/clk-mt6795-topckgen.c
522
DIV_GATE(CLK_TOP_APLL2_DIV4, "apll2_div4", "aud_2_sel", 0x12c, 20, 0x128, 8, 24),
drivers/clk/mediatek/clk-mt8173-topckgen.c
617
DIV_GATE(CLK_TOP_APLL2_DIV4, "apll2_div4", "aud_2_sel", 0x12c, 20, 0x128, 8, 24),