Symbol: CLK_TOP_APLL1_DIV5
drivers/clk/mediatek/clk-mt6795-topckgen.c
516
DIV_GATE(CLK_TOP_APLL1_DIV5, "apll1_div5", "apll1_div4", 0x12c, 13, 0x12c, 4, 0),
drivers/clk/mediatek/clk-mt8173-topckgen.c
611
DIV_GATE(CLK_TOP_APLL1_DIV5, "apll1_div5", "apll1_div4", 0x12c, 13, 0x12c, 4, 0),