CLK_TOP_APLL12_DIV1
GATE_TOP2(CLK_TOP_APLL12_DIV1, "apll12_div1", "aud_1_ck", 3),
DIV_GATE(CLK_TOP_APLL12_DIV1, "apll12_div1", "i2s1_m_ck_sel",
GATE_TOP5(CLK_TOP_APLL12_DIV1, "apll12_div1", "apll12_ck_div1", 1),
DIV_GATE(CLK_TOP_APLL12_DIV1, "apll12_div1", "apll_i2s1_sel", 0x320, 3, 0x324, 8, 8),
DIV_GATE(CLK_TOP_APLL12_DIV1, "apll12_div1", "apll_i2s1_m_sel", 0x320, 1, 0x328, 8, 8),
DIV_GATE(CLK_TOP_APLL12_DIV1, "apll12_div1", "top_i2si2_mck", 0x0320, 1, 0x0328, 8, 8),
GATE_TOP5(CLK_TOP_APLL12_DIV1, "apll12_div1", "apll12_ck_div1", 1),
.div_clk_id = CLK_TOP_APLL12_DIV1,
[CLK_TOP_APLL12_DIV1] = "top_apll12_div1",
.div_clk_id = CLK_TOP_APLL12_DIV1,
[CLK_TOP_APLL12_DIV1] = "top_apll12_div1",
.div_clk_id = CLK_TOP_APLL12_DIV1,
[CLK_TOP_APLL12_DIV1] = "top_apll12_div1",