arch/mips/pci/pci-octeon.c

564

union cvmx_npi_mem_access_subidx mem_access;

arch/mips/pci/pci-octeon.c

598

mem_access.u64 = 0;

arch/mips/pci/pci-octeon.c

599

mem_access.s.esr = 1; /* Endian-Swap on read. */

arch/mips/pci/pci-octeon.c

600

mem_access.s.esw = 1; /* Endian-Swap on write. */

arch/mips/pci/pci-octeon.c

601

mem_access.s.nsr = 0; /* No-Snoop on read. */

arch/mips/pci/pci-octeon.c

602

mem_access.s.nsw = 0; /* No-Snoop on write. */

arch/mips/pci/pci-octeon.c

603

mem_access.s.ror = 0; /* Relax Read on read. */

arch/mips/pci/pci-octeon.c

604

mem_access.s.row = 0; /* Relax Order on write. */

arch/mips/pci/pci-octeon.c

605

mem_access.s.ba = 0; /* PCI Address bits [63:36]. */

arch/mips/pci/pci-octeon.c

606

cvmx_write_csr(CVMX_NPI_MEM_ACCESS_SUBID3, mem_access.u64);

arch/powerpc/perf/power8-pmu.c

131

GENERIC_EVENT_ATTR(mem_access, MEM_ACCESS);

arch/sh/include/asm/uaccess.h

130

struct mem_access *ma, int, unsigned long address);

arch/sh/kernel/io_trapped.c

266

static struct mem_access trapped_io_access = {

arch/sh/kernel/traps_32.c

104

struct mem_access *ma)

arch/sh/kernel/traps_32.c

285

struct mem_access *ma)

arch/sh/kernel/traps_32.c

321

struct mem_access *ma, int expected,

arch/sh/kernel/traps_32.c

74

static struct mem_access user_mem_access = {

arch/sh/kernel/traps_32.c

91

static struct mem_access kernel_mem_access = {

drivers/gpu/drm/xe/xe_bo.c

1862

mutex_lock(&xe->mem_access.vram_userfault.lock);

drivers/gpu/drm/xe/xe_bo.c

1865

mutex_unlock(&xe->mem_access.vram_userfault.lock);

drivers/gpu/drm/xe/xe_bo.c

1969

mutex_lock(&xe->mem_access.vram_userfault.lock);

drivers/gpu/drm/xe/xe_bo.c

1972

&xe->mem_access.vram_userfault.list);

drivers/gpu/drm/xe/xe_bo.c

1973

mutex_unlock(&xe->mem_access.vram_userfault.lock);

drivers/gpu/drm/xe/xe_bo.c

825

mutex_lock(&xe->mem_access.vram_userfault.lock);

drivers/gpu/drm/xe/xe_bo.c

828

mutex_unlock(&xe->mem_access.vram_userfault.lock);

drivers/gpu/drm/xe/xe_device_types.h

389

} mem_access;

drivers/gpu/drm/xe/xe_pm.c

369

INIT_LIST_HEAD(&xe->mem_access.vram_userfault.list);

drivers/gpu/drm/xe/xe_pm.c

371

err = drmm_mutex_init(&xe->drm, &xe->mem_access.vram_userfault.lock);

drivers/gpu/drm/xe/xe_pm.c

622

mutex_lock(&xe->mem_access.vram_userfault.lock);

drivers/gpu/drm/xe/xe_pm.c

624

&xe->mem_access.vram_userfault.list, vram_userfault_link)

drivers/gpu/drm/xe/xe_pm.c

626

mutex_unlock(&xe->mem_access.vram_userfault.lock);

drivers/net/wireless/marvell/mwifiex/sta_cmd.c

1092

struct host_cmd_ds_mem_access *mem_access = (void *)&cmd->params.mem;

drivers/net/wireless/marvell/mwifiex/sta_cmd.c

1098

mem_access->action = cpu_to_le16(cmd_action);

drivers/net/wireless/marvell/mwifiex/sta_cmd.c

1099

mem_access->addr = cpu_to_le32(mem_rw->addr);

drivers/net/wireless/marvell/mwifiex/sta_cmd.c

1100

mem_access->value = cpu_to_le32(mem_rw->value);

drivers/perf/arm_pmuv3.c

196

ARMV8_EVENT_ATTR(mem_access, ARMV8_PMUV3_PERFCTR_MEM_ACCESS),

drivers/perf/arm_v7_pmu.c

598

ARMV7_EVENT_ATTR(mem_access, ARMV7_PERFCTR_MEM_ACCESS);

tools/perf/util/cs-etm-decoder/cs-etm-decoder.c

50

cs_etm_mem_cb_type mem_access;

tools/perf/util/cs-etm-decoder/cs-etm-decoder.c

65

return decoder->mem_access(decoder->data, trace_chan_id, address,

tools/perf/util/cs-etm-decoder/cs-etm-decoder.c

73

decoder->mem_access = cb_func;