ADF4371_REG
[ADF4371_CH_RF8] = { ADF4371_REG(0x25), 2 },
[ADF4371_CH_RFAUX8] = { ADF4371_REG(0x72), 3 },
[ADF4371_CH_RF16] = { ADF4371_REG(0x25), 3 },
[ADF4371_CH_RF32] = { ADF4371_REG(0x25), 4 },
{ ADF4371_REG(0x0), 0x18 },
{ ADF4371_REG(0x12), 0x40 },
{ ADF4371_REG(0x1E), 0x48 },
{ ADF4371_REG(0x20), 0x14 },
{ ADF4371_REG(0x22), 0x00 },
{ ADF4371_REG(0x23), 0x00 },
{ ADF4371_REG(0x24), 0x80 },
{ ADF4371_REG(0x25), 0x07 },
{ ADF4371_REG(0x27), 0xC5 },
{ ADF4371_REG(0x28), 0x83 },
{ ADF4371_REG(0x2C), 0x44 },
{ ADF4371_REG(0x2D), 0x11 },
{ ADF4371_REG(0x2E), 0x12 },
{ ADF4371_REG(0x2F), 0x94 },
{ ADF4371_REG(0x32), 0x04 },
{ ADF4371_REG(0x35), 0xFA },
{ ADF4371_REG(0x36), 0x30 },
{ ADF4371_REG(0x39), 0x07 },
{ ADF4371_REG(0x3A), 0x55 },
{ ADF4371_REG(0x3E), 0x0C },
{ ADF4371_REG(0x3F), 0x80 },
{ ADF4371_REG(0x40), 0x50 },
{ ADF4371_REG(0x41), 0x28 },
{ ADF4371_REG(0x47), 0xC0 },
{ ADF4371_REG(0x52), 0xF4 },
{ ADF4371_REG(0x70), 0x03 },
{ ADF4371_REG(0x71), 0x60 },
{ ADF4371_REG(0x72), 0x32 },
ret = regmap_bulk_write(st->regmap, ADF4371_REG(0x11), st->buf, 10);
ret = regmap_write(st->regmap, ADF4371_REG(0x1F), st->ref_div_factor);
ret = regmap_update_bits(st->regmap, ADF4371_REG(0x24),
ret = regmap_write(st->regmap, ADF4371_REG(0x26), cp_bleed);
ret = regmap_write(st->regmap, ADF4371_REG(0x2B), int_mode);
return regmap_write(st->regmap, ADF4371_REG(0x10), st->integer & 0xFF);
ret = regmap_read(st->regmap, ADF4371_REG(0x7C), &readval);
ret = regmap_write(st->regmap, ADF4371_REG(0x0), ADF4371_RESET_CMD);
ret = regmap_update_bits(st->regmap, ADF4371_REG(0x25),
ret = regmap_update_bits(st->regmap, ADF4371_REG(0x0),
ret = regmap_update_bits(st->regmap, ADF4371_REG(0x22),
return regmap_bulk_write(st->regmap, ADF4371_REG(0x30), st->buf, 5);