CLK_TIMER5
GATE(CLK_TIMER5, "clk_timer5", "clk_timer_root", 0,
GATE(CLK_TIMER5, "clk_timer5", "xin24m", 0,
GATE(CLK_TIMER5, "clk_timer5", "xin24m", 0,
GATE(CLK_TIMER5, "clk_timer5", "clk_timer0_root", 0,
GATE(CLK_TIMER5, "clk_timer5", "xin24m", 0,
GATE(CLK_TIMER5, "clk_timer5", "clk_timer_root", CLK_IS_CRITICAL,
[CLK_TIMER5] = &clk_timer5.common.hw,
[CLK_TIMER5] = &clk_timer5.common.hw,