Symbol: mdp5_crtc
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1005
spin_lock_irqsave(&mdp5_crtc->cursor.lock, flags);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1006
old_bo = mdp5_crtc->cursor.scanout_bo;
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1008
mdp5_crtc->cursor.scanout_bo = cursor_bo;
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1009
mdp5_crtc->cursor.width = width;
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1010
mdp5_crtc->cursor.height = height;
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1014
spin_unlock_irqrestore(&mdp5_crtc->cursor.lock, flags);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1029
drm_flip_work_queue(&mdp5_crtc->unref_cursor_work, old_bo);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1039
struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1047
if (!mdp5_crtc->lm_cursor_enabled) {
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1062
mdp5_crtc->cursor.x = x = max(x, -(int)mdp5_crtc->cursor.width);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1063
mdp5_crtc->cursor.y = y = max(y, -(int)mdp5_crtc->cursor.height);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1069
spin_lock_irqsave(&mdp5_crtc->cursor.lock, flags);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1071
spin_unlock_irqrestore(&mdp5_crtc->cursor.lock, flags);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1184
struct mdp5_crtc *mdp5_crtc = container_of(irq, struct mdp5_crtc, vblank);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1185
struct drm_crtc *crtc = &mdp5_crtc->base;
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1189
mdp_irq_unregister(&get_kms(crtc)->base, &mdp5_crtc->vblank);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1191
pending = atomic_xchg(&mdp5_crtc->pending, 0);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1198
drm_flip_work_commit(&mdp5_crtc->unref_cursor_work, priv->kms->wq);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1203
struct mdp5_crtc *mdp5_crtc = container_of(irq, struct mdp5_crtc, err);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1205
DBG("%s: error: %08x", mdp5_crtc->base.name, irqstatus);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1210
struct mdp5_crtc *mdp5_crtc = container_of(irq, struct mdp5_crtc,
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1213
complete_all(&mdp5_crtc->pp_completion);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1219
struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1223
ret = wait_for_completion_timeout(&mdp5_crtc->pp_completion,
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1233
struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1249
mdp5_crtc->flushed_mask) == 0),
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1252
dev_warn(dev->dev, "vblank time out, crtc=%d\n", mdp5_crtc->id);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1254
mdp5_crtc->flushed_mask = 0;
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1261
struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1262
return mdp5_crtc->vblank.irqmask;
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1324
struct mdp5_crtc *mdp5_crtc;
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1327
mdp5_crtc = drmm_crtc_alloc_with_planes(dev, struct mdp5_crtc, base,
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1333
if (IS_ERR(mdp5_crtc))
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1334
return ERR_CAST(mdp5_crtc);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1336
crtc = &mdp5_crtc->base;
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1338
mdp5_crtc->id = id;
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1340
spin_lock_init(&mdp5_crtc->lm_lock);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1341
spin_lock_init(&mdp5_crtc->cursor.lock);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1342
init_completion(&mdp5_crtc->pp_completion);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1344
mdp5_crtc->vblank.irq = mdp5_crtc_vblank_irq;
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1345
mdp5_crtc->err.irq = mdp5_crtc_err_irq;
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1346
mdp5_crtc->pp_done.irq = mdp5_crtc_pp_done_irq;
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1348
mdp5_crtc->lm_cursor_enabled = cursor_plane ? false : true;
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1350
drm_flip_work_init(&mdp5_crtc->unref_cursor_work,
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
1352
ret = drmm_add_action_or_reset(dev, mdp5_crtc_flip_cleanup, mdp5_crtc);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
142
struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
149
event = mdp5_crtc->event;
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
151
mdp5_crtc->event = NULL;
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
167
struct mdp5_crtc *mdp5_crtc =
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
168
container_of(work, struct mdp5_crtc, unref_cursor_work);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
169
struct mdp5_kms *mdp5_kms = get_kms(&mdp5_crtc->base);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
178
struct mdp5_crtc *mdp5_crtc = ptr;
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
180
drm_flip_work_cleanup(&mdp5_crtc->unref_cursor_work);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
213
struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
235
spin_lock_irqsave(&mdp5_crtc->lm_lock, flags);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
358
spin_unlock_irqrestore(&mdp5_crtc->lm_lock, flags);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
363
struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
384
spin_lock_irqsave(&mdp5_crtc->lm_lock, flags);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
407
spin_unlock_irqrestore(&mdp5_crtc->lm_lock, flags);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
490
struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
498
if (WARN_ON(!mdp5_crtc->enabled))
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
505
mdp_irq_unregister(&mdp5_kms->base, &mdp5_crtc->pp_done);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
507
mdp_irq_unregister(&mdp5_kms->base, &mdp5_crtc->err);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
511
WARN_ON(mdp5_crtc->event);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
518
mdp5_crtc->enabled = false;
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
536
struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
543
if (WARN_ON(mdp5_crtc->enabled))
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
548
if (mdp5_crtc->lm_cursor_enabled) {
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
553
if (mdp5_crtc->cursor.iova) {
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
556
spin_lock_irqsave(&mdp5_crtc->cursor.lock, flags);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
558
spin_unlock_irqrestore(&mdp5_crtc->cursor.lock, flags);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
573
mdp_irq_register(&mdp5_kms->base, &mdp5_crtc->err);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
576
mdp_irq_register(&mdp5_kms->base, &mdp5_crtc->pp_done);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
578
mdp5_crtc->enabled = true;
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
67
#define to_mdp5_crtc(x) container_of(x, struct mdp5_crtc, base)
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
79
struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
798
struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
805
WARN_ON(mdp5_crtc->event);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
808
mdp5_crtc->event = crtc->state->event;
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
81
atomic_or(pending, &mdp5_crtc->pending);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
82
mdp_irq_register(&get_kms(crtc)->base, &mdp5_crtc->vblank);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
832
mdp5_crtc->flushed_mask = crtc_flush_all(crtc);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
835
mdp5_crtc->vblank.irqmask = mdp5_cstate->vblank_irqmask;
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
836
mdp5_crtc->err.irqmask = mdp5_cstate->err_irqmask;
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
837
mdp5_crtc->pp_done.irqmask = mdp5_cstate->pp_done_irqmask;
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
844
struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
867
if (mdp5_crtc->cursor.x >= 0)
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
868
*roi_w = min(mdp5_crtc->cursor.width, xres -
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
869
mdp5_crtc->cursor.x);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
87
struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
871
*roi_w = mdp5_crtc->cursor.width - abs(mdp5_crtc->cursor.x);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
872
if (mdp5_crtc->cursor.y >= 0)
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
873
*roi_h = min(mdp5_crtc->cursor.height, yres -
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
874
mdp5_crtc->cursor.y);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
876
*roi_h = mdp5_crtc->cursor.height - abs(mdp5_crtc->cursor.y);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
88
reinit_completion(&mdp5_crtc->pp_completion);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
883
struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
891
assert_spin_locked(&mdp5_crtc->cursor.lock);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
895
x = mdp5_crtc->cursor.x;
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
896
y = mdp5_crtc->cursor.y;
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
897
width = mdp5_crtc->cursor.width;
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
898
height = mdp5_crtc->cursor.height;
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
909
if (mdp5_crtc->cursor.x < 0) {
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
910
src_x = abs(mdp5_crtc->cursor.x);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
915
if (mdp5_crtc->cursor.y < 0) {
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
916
src_y = abs(mdp5_crtc->cursor.y);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
940
mdp5_crtc->cursor.iova);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
951
struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc);
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
965
if (!mdp5_crtc->lm_cursor_enabled) {
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
987
mdp5_crtc->cursor.iova = 0;
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
997
&mdp5_crtc->cursor.iova);