drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c

106

clk_disable_unprepare(mdp4_dtv_encoder->hdmi_clk);

drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c

107

clk_disable_unprepare(mdp4_dtv_encoder->mdp_clk);

drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c

109

mdp4_dtv_encoder->enabled = false;

drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c

115

struct mdp4_dtv_encoder *mdp4_dtv_encoder = to_mdp4_dtv_encoder(encoder);

drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c

117

unsigned long pc = mdp4_dtv_encoder->pixclock;

drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c

120

if (WARN_ON(mdp4_dtv_encoder->enabled))

drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c

132

ret = clk_set_rate(mdp4_dtv_encoder->mdp_clk, pc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c

137

ret = clk_prepare_enable(mdp4_dtv_encoder->mdp_clk);

drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c

141

ret = clk_prepare_enable(mdp4_dtv_encoder->hdmi_clk);

drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c

147

mdp4_dtv_encoder->enabled = true;

drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c

158

struct mdp4_dtv_encoder *mdp4_dtv_encoder = to_mdp4_dtv_encoder(encoder);

drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c

159

return clk_round_rate(mdp4_dtv_encoder->mdp_clk, rate);

drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c

166

struct mdp4_dtv_encoder *mdp4_dtv_encoder;

drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c

168

mdp4_dtv_encoder = drmm_encoder_alloc(dev, struct mdp4_dtv_encoder, base,

drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c

170

if (IS_ERR(mdp4_dtv_encoder))

drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c

171

return ERR_CAST(mdp4_dtv_encoder);

drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c

173

encoder = &mdp4_dtv_encoder->base;

drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c

177

mdp4_dtv_encoder->hdmi_clk = devm_clk_get(dev->dev, "hdmi_clk");

drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c

178

if (IS_ERR(mdp4_dtv_encoder->hdmi_clk)) {

drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c

180

return ERR_CAST(mdp4_dtv_encoder->hdmi_clk);

drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c

183

mdp4_dtv_encoder->mdp_clk = devm_clk_get(dev->dev, "tv_clk");

drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c

184

if (IS_ERR(mdp4_dtv_encoder->mdp_clk)) {

drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c

186

return ERR_CAST(mdp4_dtv_encoder->mdp_clk);

drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c

20

#define to_mdp4_dtv_encoder(x) container_of(x, struct mdp4_dtv_encoder, base)

drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c

32

struct mdp4_dtv_encoder *mdp4_dtv_encoder = to_mdp4_dtv_encoder(encoder);

drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c

42

mdp4_dtv_encoder->pixclock = mode->clock * 1000;

drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c

44

DBG("pixclock=%lu", mdp4_dtv_encoder->pixclock);

drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c

88

struct mdp4_dtv_encoder *mdp4_dtv_encoder = to_mdp4_dtv_encoder(encoder);

drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c

91

if (WARN_ON(!mdp4_dtv_encoder->enabled))