CLK_SPI2
[CLK_SPI2] = &spi2_clk.common.hw,
[CLK_SPI2] = &clk_spi2.common.hw,
[CLK_SPI2] = &spi2_clk.common.hw,
D_GATE(CLK_SPI2, "clk_spi2", DIV_P3_PG, RB(0xfc, 4),
GATE(CLK_SPI2, "clk_spi2", "clk_spi2_io", 0,
COMPOSITE_NODIV(CLK_SPI2, "clk_spi2", mux_200m_100m_50m_xin24m_p, 0,
COMPOSITE_NODIV(CLK_SPI2, "clk_spi2", gpll200_xin24m_cpll100_p, 0,
COMPOSITE_NODIV(CLK_SPI2, "clk_spi2", mux_200m_100m_50m_24m_p, 0,
COMPOSITE_NODIV(CLK_SPI2, "clk_spi2", mux_200m_150m_24m_p, 0,
GATE(CLK_SPI2, "spi2", "aclk100", GATE_IP_PERIL, 18,
GATE(CLK_SPI2, "spi2", "div_aclk66", GATE_IP_PERIC, 18, 0, 0),
GATE(CLK_SPI2, "spi2", "mout_user_aclk66_peric",
[CLK_SPI2] = &spi2_clk.common.hw,
[CLK_SPI2] = &spi2_clk.common.hw,
[CLK_SPI2] = &spi2_clk.common.hw,
[CLK_SPI2] = &spi2_clk.common.hw,
[CLK_SPI2] = &spi2_clk.common.hw,
[CLK_SPI2] = &spi2_clk.common.hw,
[CLK_SPI2] = &spi2_clk.common.hw,
[CLK_SPI2] = &spi2_clk.common.hw,
[CLK_SPI2] = &spi2_clk.common.hw,
[CLK_SPI2] = &spi2_clk.common.hw,
[CLK_SPI2] = &spi2_clk.common.hw,
K210_FUNC(CLK_SPI2, OUT),