drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3094

struct mcif_wb *mcif_wb = params->mcif_wb_config_buf_params.mcif_wb;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3098

if (mcif_wb->funcs->config_mcif_buf)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3099

mcif_wb->funcs->config_mcif_buf(mcif_wb, mcif_buf_params, dest_height);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3104

struct mcif_wb *mcif_wb = params->mcif_wb_config_arb_params.mcif_wb;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3107

if (mcif_wb->funcs->config_mcif_arb)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3108

mcif_wb->funcs->config_mcif_arb(mcif_wb, mcif_arb_params);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3113

struct mcif_wb *mcif_wb = params->mcif_wb_enable_params.mcif_wb;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3115

if (mcif_wb->funcs->enable_mcif)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3116

mcif_wb->funcs->enable_mcif(mcif_wb);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3121

struct mcif_wb *mcif_wb = params->mcif_wb_disable_params.mcif_wb;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3123

if (mcif_wb->funcs->disable_mcif)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3124

mcif_wb->funcs->disable_mcif(mcif_wb);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4115

struct mcif_wb *mcif_wb,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4121

seq_state->steps[*seq_state->num_steps].params.mcif_wb_config_buf_params.mcif_wb = mcif_wb;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4129

struct mcif_wb *mcif_wb,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4134

seq_state->steps[*seq_state->num_steps].params.mcif_wb_config_arb_params.mcif_wb = mcif_wb;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4141

struct mcif_wb *mcif_wb)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4145

seq_state->steps[*seq_state->num_steps].params.mcif_wb_enable_params.mcif_wb = mcif_wb;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4151

struct mcif_wb *mcif_wb)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4155

seq_state->steps[*seq_state->num_steps].params.mcif_wb_disable_params.mcif_wb = mcif_wb;

drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mmhubbub.c

103

static void mmhubbub3_config_mcif_buf(struct mcif_wb *mcif_wb,

drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mmhubbub.c

107

struct dcn30_mmhubbub *mcif_wb30 = TO_DCN30_MMHUBBUB(mcif_wb);

drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mmhubbub.c

156

static void mmhubbub3_config_mcif_arb(struct mcif_wb *mcif_wb,

drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mmhubbub.c

159

struct dcn30_mmhubbub *mcif_wb30 = TO_DCN30_MMHUBBUB(mcif_wb);

drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mmhubbub.c

76

static void mmhubbub3_warmup_mcif(struct mcif_wb *mcif_wb,

drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mmhubbub.c

79

struct dcn30_mmhubbub *mcif_wb30 = TO_DCN30_MMHUBBUB(mcif_wb);

drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mmhubbub.h

435

struct mcif_wb base;

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2545

struct mcif_wb *mcif_wb;

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2551

mcif_wb = dc->res_pool->mcif_wb[wb_info->dwb_pipe_inst];

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2557

mcif_wb->funcs->config_mcif_buf(mcif_wb, &wb_info->mcif_buf_params, wb_info->dwb_params.dest_height);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2558

mcif_wb->funcs->config_mcif_arb(mcif_wb, &context->bw_ctx.bw.dcn.bw_writeback.mcif_wb_arb[wb_info->dwb_pipe_inst]);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2560

mcif_wb->funcs->enable_mcif(mcif_wb);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2571

struct mcif_wb *mcif_wb;

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2575

mcif_wb = dc->res_pool->mcif_wb[dwb_pipe_inst];

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2578

mcif_wb->funcs->disable_mcif(mcif_wb);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3242

res_pool->dwbc[i]->mcif = res_pool->mcif_wb[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

334

res_pool->dwbc[i]->mcif = res_pool->mcif_wb[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

436

struct mcif_wb *mcif_wb;

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

443

mcif_wb = dc->res_pool->mcif_wb[wb_info->dwb_pipe_inst];

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

450

mcif_wb->funcs->config_mcif_buf(mcif_wb, mcif_buf_params, wb_info->dwb_params.dest_height);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

451

mcif_wb->funcs->config_mcif_arb(mcif_wb, &context->bw_ctx.bw.dcn.bw_writeback.mcif_wb_arb[wb_info->dwb_pipe_inst]);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

477

struct mcif_wb *mcif_wb;

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

496

mcif_wb = dc->res_pool->mcif_wb[0];

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

506

mcif_wb->funcs->warmup_mcif(mcif_wb, &warmup_params);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

511

mcif_wb = dc->res_pool->mcif_wb[wb_info[i].dwb_pipe_inst];

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

522

mcif_wb->funcs->warmup_mcif(mcif_wb, &warmup_params);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

534

struct mcif_wb *mcif_wb;

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

537

mcif_wb = dc->res_pool->mcif_wb[wb_info->dwb_pipe_inst];

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

550

mcif_wb->funcs->enable_mcif(mcif_wb);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

560

struct mcif_wb *mcif_wb;

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

564

mcif_wb = dc->res_pool->mcif_wb[dwb_pipe_inst];

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

571

mcif_wb->funcs->disable_mcif(mcif_wb);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3371

struct mcif_wb *mcif_wb;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3377

mcif_wb = dc->res_pool->mcif_wb[wb_info->dwb_pipe_inst];

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3383

hwss_add_mcif_wb_config_buf(seq_state, mcif_wb, &wb_info->mcif_buf_params, wb_info->dwb_params.dest_height);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3386

hwss_add_mcif_wb_config_arb(seq_state, mcif_wb, &context->bw_ctx.bw.dcn.bw_writeback.mcif_wb_arb[wb_info->dwb_pipe_inst]);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3389

hwss_add_mcif_wb_enable(seq_state, mcif_wb);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3404

struct mcif_wb *mcif_wb;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3410

mcif_wb = dc->res_pool->mcif_wb[wb_info->dwb_pipe_inst];

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3419

hwss_add_mcif_wb_disable(seq_state, mcif_wb);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3430

struct mcif_wb *mcif_wb;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3436

mcif_wb = dc->res_pool->mcif_wb[wb_info->dwb_pipe_inst];

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3442

hwss_add_mcif_wb_config_buf(seq_state, mcif_wb, &wb_info->mcif_buf_params, wb_info->dwb_params.dest_height);

drivers/gpu/drm/amd/display/dc/hwss/dcn42b/dcn42b_hwseq.c

118

dc->res_pool->dwbc[i]->mcif = dc->res_pool->mcif_wb[i];

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2098

struct mcif_wb *mcif_wb,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2103

struct mcif_wb *mcif_wb,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2107

struct mcif_wb *mcif_wb);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2110

struct mcif_wb *mcif_wb);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

515

struct mcif_wb *mcif_wb;

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

521

struct mcif_wb *mcif_wb;

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

526

struct mcif_wb *mcif_wb;

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

530

struct mcif_wb *mcif_wb;

drivers/gpu/drm/amd/display/dc/inc/core_types.h

267

struct mcif_wb *mcif_wb[MAX_DWB_PIPES];

drivers/gpu/drm/amd/display/dc/inc/core_types.h

507

struct mcif_wb *mcif_wb;

drivers/gpu/drm/amd/display/dc/inc/hw/dwb.h

160

struct mcif_wb *mcif;

drivers/gpu/drm/amd/display/dc/inc/hw/dwb.h

35

struct mcif_wb;

drivers/gpu/drm/amd/display/dc/inc/hw/mcif_wb.h

77

struct mcif_wb *mcif_wb,

drivers/gpu/drm/amd/display/dc/inc/hw/mcif_wb.h

79

void (*enable_mcif)(struct mcif_wb *mcif_wb);

drivers/gpu/drm/amd/display/dc/inc/hw/mcif_wb.h

81

void (*disable_mcif)(struct mcif_wb *mcif_wb);

drivers/gpu/drm/amd/display/dc/inc/hw/mcif_wb.h

84

struct mcif_wb *mcif_wb,

drivers/gpu/drm/amd/display/dc/inc/hw/mcif_wb.h

89

struct mcif_wb *mcif_wb,

drivers/gpu/drm/amd/display/dc/inc/hw/mcif_wb.h

93

struct mcif_wb *mcif_wb,

drivers/gpu/drm/amd/display/dc/inc/hw/mcif_wb.h

97

struct mcif_wb *mcif_wb,

drivers/gpu/drm/amd/display/dc/mmhubbub/dcn20/dcn20_mmhubbub.c

153

static void mmhubbub2_config_mcif_arb(struct mcif_wb *mcif_wb,

drivers/gpu/drm/amd/display/dc/mmhubbub/dcn20/dcn20_mmhubbub.c

156

struct dcn20_mmhubbub *mcif_wb20 = TO_DCN20_MMHUBBUB(mcif_wb);

drivers/gpu/drm/amd/display/dc/mmhubbub/dcn20/dcn20_mmhubbub.c

207

void mmhubbub2_config_mcif_irq(struct mcif_wb *mcif_wb,

drivers/gpu/drm/amd/display/dc/mmhubbub/dcn20/dcn20_mmhubbub.c

210

struct dcn20_mmhubbub *mcif_wb20 = TO_DCN20_MMHUBBUB(mcif_wb);

drivers/gpu/drm/amd/display/dc/mmhubbub/dcn20/dcn20_mmhubbub.c

222

void mmhubbub2_enable_mcif(struct mcif_wb *mcif_wb)

drivers/gpu/drm/amd/display/dc/mmhubbub/dcn20/dcn20_mmhubbub.c

224

struct dcn20_mmhubbub *mcif_wb20 = TO_DCN20_MMHUBBUB(mcif_wb);

drivers/gpu/drm/amd/display/dc/mmhubbub/dcn20/dcn20_mmhubbub.c

230

void mmhubbub2_disable_mcif(struct mcif_wb *mcif_wb)

drivers/gpu/drm/amd/display/dc/mmhubbub/dcn20/dcn20_mmhubbub.c

232

struct dcn20_mmhubbub *mcif_wb20 = TO_DCN20_MMHUBBUB(mcif_wb);

drivers/gpu/drm/amd/display/dc/mmhubbub/dcn20/dcn20_mmhubbub.c

272

void mcifwb2_dump_frame(struct mcif_wb *mcif_wb,

drivers/gpu/drm/amd/display/dc/mmhubbub/dcn20/dcn20_mmhubbub.c

283

struct dcn20_mmhubbub *mcif_wb20 = TO_DCN20_MMHUBBUB(mcif_wb);

drivers/gpu/drm/amd/display/dc/mmhubbub/dcn20/dcn20_mmhubbub.c

76

static void mmhubbub2_config_mcif_buf(struct mcif_wb *mcif_wb,

drivers/gpu/drm/amd/display/dc/mmhubbub/dcn20/dcn20_mmhubbub.c

80

struct dcn20_mmhubbub *mcif_wb20 = TO_DCN20_MMHUBBUB(mcif_wb);

drivers/gpu/drm/amd/display/dc/mmhubbub/dcn20/dcn20_mmhubbub.h

486

struct mcif_wb base;

drivers/gpu/drm/amd/display/dc/mmhubbub/dcn20/dcn20_mmhubbub.h

492

void mmhubbub2_config_mcif_irq(struct mcif_wb *mcif_wb,

drivers/gpu/drm/amd/display/dc/mmhubbub/dcn20/dcn20_mmhubbub.h

495

void mmhubbub2_enable_mcif(struct mcif_wb *mcif_wb);

drivers/gpu/drm/amd/display/dc/mmhubbub/dcn20/dcn20_mmhubbub.h

497

void mmhubbub2_disable_mcif(struct mcif_wb *mcif_wb);

drivers/gpu/drm/amd/display/dc/mmhubbub/dcn20/dcn20_mmhubbub.h

499

void mcifwb2_dump_frame(struct mcif_wb *mcif_wb,

drivers/gpu/drm/amd/display/dc/mmhubbub/dcn32/dcn32_mmhubbub.c

103

static void mmhubbub32_config_mcif_buf(struct mcif_wb *mcif_wb,

drivers/gpu/drm/amd/display/dc/mmhubbub/dcn32/dcn32_mmhubbub.c

107

struct dcn30_mmhubbub *mcif_wb30 = TO_DCN30_MMHUBBUB(mcif_wb);

drivers/gpu/drm/amd/display/dc/mmhubbub/dcn32/dcn32_mmhubbub.c

156

static void mmhubbub32_config_mcif_arb(struct mcif_wb *mcif_wb,

drivers/gpu/drm/amd/display/dc/mmhubbub/dcn32/dcn32_mmhubbub.c

159

struct dcn30_mmhubbub *mcif_wb30 = TO_DCN30_MMHUBBUB(mcif_wb);

drivers/gpu/drm/amd/display/dc/mmhubbub/dcn32/dcn32_mmhubbub.c

76

static void mmhubbub32_warmup_mcif(struct mcif_wb *mcif_wb,

drivers/gpu/drm/amd/display/dc/mmhubbub/dcn32/dcn32_mmhubbub.c

79

struct dcn30_mmhubbub *mcif_wb30 = TO_DCN30_MMHUBBUB(mcif_wb);

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1189

if (pool->base.mcif_wb[i] != NULL) {

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1190

kfree(TO_DCN20_MMHUBBUB(pool->base.mcif_wb[i]));

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1191

pool->base.mcif_wb[i] = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2336

pool->mcif_wb[i] = &mcif_wb20->base;

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

752

if (pool->base.mcif_wb[i] != NULL) {

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

753

kfree(TO_DCN20_MMHUBBUB(pool->base.mcif_wb[i]));

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

754

pool->base.mcif_wb[i] = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1303

if (pool->base.mcif_wb[i] != NULL) {

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1304

kfree(TO_DCN30_MMHUBBUB(pool->base.mcif_wb[i]));

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1305

pool->base.mcif_wb[i] = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1417

pool->mcif_wb[i] = &mcif_wb30->base;

drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

1152

if (pool->base.mcif_wb[i] != NULL) {

drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

1153

kfree(TO_DCN30_MMHUBBUB(pool->base.mcif_wb[i]));

drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

1154

pool->base.mcif_wb[i] = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

1255

pool->mcif_wb[i] = &mcif_wb30->base;

drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

1210

if (pool->mcif_wb[i] != NULL) {

drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

1211

kfree(TO_DCN30_MMHUBBUB(pool->mcif_wb[i]));

drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

1212

pool->mcif_wb[i] = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

877

pool->mcif_wb[i] = &mcif_wb30->base;

drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

1154

if (pool->mcif_wb[i] != NULL) {

drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

1155

kfree(TO_DCN30_MMHUBBUB(pool->mcif_wb[i]));

drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

1156

pool->mcif_wb[i] = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

838

pool->mcif_wb[i] = &mcif_wb30->base;

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1603

if (pool->base.mcif_wb[i] != NULL) {

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1604

kfree(TO_DCN30_MMHUBBUB(pool->base.mcif_wb[i]));

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1605

pool->base.mcif_wb[i] = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1714

pool->mcif_wb[i] = &mcif_wb30->base;

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

1662

if (pool->base.mcif_wb[i] != NULL) {

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

1663

kfree(TO_DCN30_MMHUBBUB(pool->base.mcif_wb[i]));

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

1664

pool->base.mcif_wb[i] = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

1773

pool->mcif_wb[i] = &mcif_wb30->base;

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1605

if (pool->base.mcif_wb[i] != NULL) {

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1606

kfree(TO_DCN30_MMHUBBUB(pool->base.mcif_wb[i]));

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1607

pool->base.mcif_wb[i] = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1716

pool->mcif_wb[i] = &mcif_wb30->base;

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

1598

if (pool->base.mcif_wb[i] != NULL) {

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

1599

kfree(TO_DCN30_MMHUBBUB(pool->base.mcif_wb[i]));

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

1600

pool->base.mcif_wb[i] = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

1706

pool->mcif_wb[i] = &mcif_wb30->base;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1615

if (pool->base.mcif_wb[i] != NULL) {

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1616

kfree(TO_DCN30_MMHUBBUB(pool->base.mcif_wb[i]));

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1617

pool->base.mcif_wb[i] = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1724

pool->mcif_wb[i] = &mcif_wb30->base;

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

1589

if (pool->base.mcif_wb[i] != NULL) {

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

1590

kfree(TO_DCN30_MMHUBBUB(pool->base.mcif_wb[i]));

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

1591

pool->base.mcif_wb[i] = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

1698

pool->mcif_wb[i] = &mcif_wb30->base;

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

1664

if (pool->base.mcif_wb[i] != NULL) {

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

1665

kfree(TO_DCN30_MMHUBBUB(pool->base.mcif_wb[i]));

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

1666

pool->base.mcif_wb[i] = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

1816

pool->mcif_wb[i] = &mcif_wb30->base;

drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

1644

if (pool->base.mcif_wb[i] != NULL) {

drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

1645

kfree(TO_DCN30_MMHUBBUB(pool->base.mcif_wb[i]));

drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

1646

pool->base.mcif_wb[i] = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

1796

pool->mcif_wb[i] = &mcif_wb30->base;

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

1651

if (pool->base.mcif_wb[i] != NULL) {

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

1652

kfree(TO_DCN30_MMHUBBUB(pool->base.mcif_wb[i]));

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

1653

pool->base.mcif_wb[i] = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

1803

pool->mcif_wb[i] = &mcif_wb30->base;

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1605

if (pool->base.mcif_wb[i] != NULL) {

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1606

kfree(TO_DCN30_MMHUBBUB(pool->base.mcif_wb[i]));

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1607

pool->base.mcif_wb[i] = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1716

pool->mcif_wb[i] = &mcif_wb30->base;

drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c

1597

if (pool->base.mcif_wb[i] != NULL) {

drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c

1598

kfree(TO_DCN30_MMHUBBUB(pool->base.mcif_wb[i]));

drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c

1599

pool->base.mcif_wb[i] = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c

1781

pool->mcif_wb[i] = &mcif_wb30->base;

drivers/gpu/drm/amd/display/dc/resource/dcn42b/dcn42b_resource.c

1564

if (pool->base.mcif_wb[i] != NULL) {

drivers/gpu/drm/amd/display/dc/resource/dcn42b/dcn42b_resource.c

1565

kfree(TO_DCN30_MMHUBBUB(pool->base.mcif_wb[i]));

drivers/gpu/drm/amd/display/dc/resource/dcn42b/dcn42b_resource.c

1566

pool->base.mcif_wb[i] = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn42b/dcn42b_resource.c

1746

pool->mcif_wb[i] = &mcif_wb30->base;