mcfqspi
writew(val, mcfqspi->iobase + MCFQSPI_QDR);
static u16 mcfqspi_rd_qdr(struct mcfqspi *mcfqspi)
return readw(mcfqspi->iobase + MCFQSPI_QDR);
static void mcfqspi_cs_select(struct mcfqspi *mcfqspi, u8 chip_select,
mcfqspi->cs_control->select(mcfqspi->cs_control, chip_select, cs_high);
static void mcfqspi_cs_deselect(struct mcfqspi *mcfqspi, u8 chip_select,
mcfqspi->cs_control->deselect(mcfqspi->cs_control, chip_select, cs_high);
static int mcfqspi_cs_setup(struct mcfqspi *mcfqspi)
return (mcfqspi->cs_control->setup) ?
mcfqspi->cs_control->setup(mcfqspi->cs_control) : 0;
static void mcfqspi_cs_teardown(struct mcfqspi *mcfqspi)
if (mcfqspi->cs_control->teardown)
mcfqspi->cs_control->teardown(mcfqspi->cs_control);
static bool mcfqspi_qdlyr_spe(struct mcfqspi *mcfqspi)
return mcfqspi_rd_qdlyr(mcfqspi) & MCFQSPI_QDLYR_SPE;
struct mcfqspi *mcfqspi = dev_id;
mcfqspi_wr_qir(mcfqspi, MCFQSPI_QIR_SPIFE | MCFQSPI_QIR_SPIF);
wake_up(&mcfqspi->waitq);
static void mcfqspi_transfer_msg8(struct mcfqspi *mcfqspi, unsigned count,
mcfqspi_wr_qar(mcfqspi, MCFQSPI_QAR_CMDBUF);
mcfqspi_wr_qdr(mcfqspi, MCFQSPI_QCR_BITSE);
mcfqspi_wr_qar(mcfqspi, MCFQSPI_QAR_TXBUF);
mcfqspi_wr_qdr(mcfqspi, *txbuf++);
mcfqspi_wr_qdr(mcfqspi, 0);
mcfqspi_wr_qwr(mcfqspi, 0x700);
mcfqspi_wr_qdlyr(mcfqspi, MCFQSPI_QDLYR_SPE);
wait_event(mcfqspi->waitq, !mcfqspi_qdlyr_spe(mcfqspi));
mcfqspi_wr_qwr(mcfqspi, qwr);
mcfqspi_wr_qdlyr(mcfqspi, MCFQSPI_QDLYR_SPE);
mcfqspi_wr_qar(mcfqspi,
*rxbuf++ = mcfqspi_rd_qdr(mcfqspi);
mcfqspi_wr_qar(mcfqspi,
mcfqspi_wr_qdr(mcfqspi, *txbuf++);
wait_event(mcfqspi->waitq, !mcfqspi_qdlyr_spe(mcfqspi));
mcfqspi_wr_qwr(mcfqspi, qwr);
mcfqspi_wr_qdlyr(mcfqspi, MCFQSPI_QDLYR_SPE);
mcfqspi_wr_qar(mcfqspi, MCFQSPI_QAR_RXBUF + offset);
*rxbuf++ = mcfqspi_rd_qdr(mcfqspi);
mcfqspi_wr_qwr(mcfqspi, (n - 1) << 8);
mcfqspi_wr_qdlyr(mcfqspi, MCFQSPI_QDLYR_SPE);
wait_event(mcfqspi->waitq, !mcfqspi_qdlyr_spe(mcfqspi));
mcfqspi_wr_qar(mcfqspi, MCFQSPI_QAR_RXBUF + offset);
*rxbuf++ = mcfqspi_rd_qdr(mcfqspi);
static void mcfqspi_transfer_msg16(struct mcfqspi *mcfqspi, unsigned count,
mcfqspi_wr_qar(mcfqspi, MCFQSPI_QAR_CMDBUF);
mcfqspi_wr_qdr(mcfqspi, MCFQSPI_QCR_BITSE);
mcfqspi_wr_qar(mcfqspi, MCFQSPI_QAR_TXBUF);
mcfqspi_wr_qdr(mcfqspi, *txbuf++);
mcfqspi_wr_qdr(mcfqspi, 0);
mcfqspi_wr_qwr(mcfqspi, 0x700);
mcfqspi_wr_qdlyr(mcfqspi, MCFQSPI_QDLYR_SPE);
wait_event(mcfqspi->waitq, !mcfqspi_qdlyr_spe(mcfqspi));
mcfqspi_wr_qwr(mcfqspi, qwr);
mcfqspi_wr_qdlyr(mcfqspi, MCFQSPI_QDLYR_SPE);
mcfqspi_wr_qar(mcfqspi,
*rxbuf++ = mcfqspi_rd_qdr(mcfqspi);
mcfqspi_wr_qar(mcfqspi,
mcfqspi_wr_qdr(mcfqspi, *txbuf++);
wait_event(mcfqspi->waitq, !mcfqspi_qdlyr_spe(mcfqspi));
mcfqspi_wr_qwr(mcfqspi, qwr);
mcfqspi_wr_qdlyr(mcfqspi, MCFQSPI_QDLYR_SPE);
mcfqspi_wr_qar(mcfqspi, MCFQSPI_QAR_RXBUF + offset);
*rxbuf++ = mcfqspi_rd_qdr(mcfqspi);
mcfqspi_wr_qwr(mcfqspi, (n - 1) << 8);
mcfqspi_wr_qdlyr(mcfqspi, MCFQSPI_QDLYR_SPE);
wait_event(mcfqspi->waitq, !mcfqspi_qdlyr_spe(mcfqspi));
mcfqspi_wr_qar(mcfqspi, MCFQSPI_QAR_RXBUF + offset);
*rxbuf++ = mcfqspi_rd_qdr(mcfqspi);
struct mcfqspi *mcfqspi = spi_controller_get_devdata(spi->controller);
mcfqspi_cs_select(mcfqspi, spi_get_chipselect(spi, 0), cs_high);
mcfqspi_cs_deselect(mcfqspi, spi_get_chipselect(spi, 0), cs_high);
struct mcfqspi *mcfqspi = spi_controller_get_devdata(host);
mcfqspi_wr_qmr(mcfqspi, qmr);
mcfqspi_wr_qir(mcfqspi, MCFQSPI_QIR_SPIFE);
mcfqspi_transfer_msg8(mcfqspi, t->len, t->tx_buf, t->rx_buf);
mcfqspi_transfer_msg16(mcfqspi, t->len / 2, t->tx_buf,
mcfqspi_wr_qir(mcfqspi, 0);
struct mcfqspi *mcfqspi;
host = devm_spi_alloc_host(&pdev->dev, sizeof(*mcfqspi));
mcfqspi = spi_controller_get_devdata(host);
mcfqspi->iobase = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(mcfqspi->iobase))
return PTR_ERR(mcfqspi->iobase);
mcfqspi->irq = platform_get_irq(pdev, 0);
if (mcfqspi->irq < 0) {
status = devm_request_irq(&pdev->dev, mcfqspi->irq, mcfqspi_irq_handler,
0, pdev->name, mcfqspi);
mcfqspi->clk = devm_clk_get_enabled(&pdev->dev, "qspi_clk");
if (IS_ERR(mcfqspi->clk)) {
return PTR_ERR(mcfqspi->clk);
mcfqspi->cs_control = pdata->cs_control;
status = mcfqspi_cs_setup(mcfqspi);
init_waitqueue_head(&mcfqspi->waitq);
mcfqspi_cs_teardown(mcfqspi);
struct mcfqspi *mcfqspi = spi_controller_get_devdata(host);
mcfqspi_wr_qmr(mcfqspi, MCFQSPI_QMR_MSTR);
mcfqspi_cs_teardown(mcfqspi);
struct mcfqspi *mcfqspi = spi_controller_get_devdata(host);
clk_disable(mcfqspi->clk);
struct mcfqspi *mcfqspi = spi_controller_get_devdata(host);
clk_enable(mcfqspi->clk);
struct mcfqspi *mcfqspi = spi_controller_get_devdata(host);
clk_disable(mcfqspi->clk);
struct mcfqspi *mcfqspi = spi_controller_get_devdata(host);
clk_enable(mcfqspi->clk);
static void mcfqspi_wr_qmr(struct mcfqspi *mcfqspi, u16 val)
writew(val, mcfqspi->iobase + MCFQSPI_QMR);
static void mcfqspi_wr_qdlyr(struct mcfqspi *mcfqspi, u16 val)
writew(val, mcfqspi->iobase + MCFQSPI_QDLYR);
static u16 mcfqspi_rd_qdlyr(struct mcfqspi *mcfqspi)
return readw(mcfqspi->iobase + MCFQSPI_QDLYR);
static void mcfqspi_wr_qwr(struct mcfqspi *mcfqspi, u16 val)
writew(val, mcfqspi->iobase + MCFQSPI_QWR);
static void mcfqspi_wr_qir(struct mcfqspi *mcfqspi, u16 val)
writew(val, mcfqspi->iobase + MCFQSPI_QIR);
static void mcfqspi_wr_qar(struct mcfqspi *mcfqspi, u16 val)
writew(val, mcfqspi->iobase + MCFQSPI_QAR);
static void mcfqspi_wr_qdr(struct mcfqspi *mcfqspi, u16 val)