mce_rdmsrq
m->status = mce_rdmsrq(mca_msr_reg(i, MCA_STATUS));
m->mcgstatus = mce_rdmsrq(MSR_IA32_MCG_STATUS);
m->ip = mce_rdmsrq(mca_cfg.rip_msr);
m->misc = mce_rdmsrq(mca_msr_reg(i, MCA_MISC));
m->addr = mce_rdmsrq(MSR_AMD64_SMCA_MCx_DEADDR(i));
m->addr = mce_rdmsrq(mca_msr_reg(i, MCA_ADDR));
m->ipid = mce_rdmsrq(MSR_AMD64_SMCA_MCx_IPID(i));
m->synd = mce_rdmsrq(MSR_AMD64_SMCA_MCx_SYND(i));
err->vendor.amd.synd1 = mce_rdmsrq(MSR_AMD64_SMCA_MCx_SYND1(i));
err->vendor.amd.synd2 = mce_rdmsrq(MSR_AMD64_SMCA_MCx_SYND2(i));
m->status = mce_rdmsrq(MSR_AMD64_SMCA_MCx_DESTAT(m->bank));
m->status = mce_rdmsrq(mca_msr_reg(i, MCA_STATUS));
u64 mcgstatus = mce_rdmsrq(MSR_IA32_MCG_STATUS);
u64 misc_enable = mce_rdmsrq(MSR_IA32_MISC_ENABLE);
mc1_status = mce_rdmsrq(MSR_IA32_MCx_STATUS(1));
m->status = mce_rdmsrq(mca_msr_reg(i, MCA_STATUS));
noinstr u64 mce_rdmsrq(u32 msr);