CLK_SOURCE_EMC
clk_base + CLK_SOURCE_EMC,
clk = tegra_clk_register_mc("mc", "emc_mux", clk_base + CLK_SOURCE_EMC,
val = readl(tegra->clk_regs + CLK_SOURCE_EMC);
val = readl(tegra->clk_regs + CLK_SOURCE_EMC);
car_value = readl(tegra->clk_regs + CLK_SOURCE_EMC);
writel(car_value, tegra->clk_regs + CLK_SOURCE_EMC);
clk = tegra_clk_register_mc("mc", "emc", clk_base + CLK_SOURCE_EMC,
clk = tegra20_clk_register_emc(clk_base + CLK_SOURCE_EMC, false);
clk = tegra_clk_register_mc("mc", "emc", clk_base + CLK_SOURCE_EMC,
value = readl_relaxed(emc->regs + CLK_SOURCE_EMC);
value = readl_relaxed(emc->regs + CLK_SOURCE_EMC);
clk_base + CLK_SOURCE_EMC,
writel_relaxed(emc_src_value, clk_base + CLK_SOURCE_EMC);
clk = tegra20_clk_register_emc(clk_base + CLK_SOURCE_EMC, true);
clk = tegra_clk_register_mc("mc", "emc", clk_base + CLK_SOURCE_EMC,