Symbol: mc_writel
drivers/memory/tegra/mc.c
169
mc_writel(mc, value, rst->control);
drivers/memory/tegra/mc.c
191
mc_writel(mc, value, rst->control);
drivers/memory/tegra/mc.c
387
mc_writel(mc, timing->emem_data[i], mc->soc->emem_regs[i]);
drivers/memory/tegra/mc.c
427
mc_writel(mc, value, MC_EMEM_ARB_CFG);
drivers/memory/tegra/mc.c
437
mc_writel(mc, value, client->regs.la.reg);
drivers/memory/tegra/mc.c
441
mc_writel(mc, MC_TIMING_UPDATE, MC_TIMING_CONTROL);
drivers/memory/tegra/mc.c
540
mc_writel(mc, 0x00000000, MC_TIMING_CONTROL_DBG);
drivers/memory/tegra/mc.c
746
mc_writel(mc, status, MC_INTSTATUS);
drivers/memory/tegra/mc.c
926
mc_writel(mc, mc->soc->intmasks[i].mask, mc->soc->intmasks[i].reg);
drivers/memory/tegra/tegra114.c
1174
mc_writel(mc, value, client->regs.la.reg);
drivers/memory/tegra/tegra20.c
288
mc_writel(mc, value & ~BIT(rst->bit), rst->reset);
drivers/memory/tegra/tegra20.c
304
mc_writel(mc, value | BIT(rst->bit), rst->reset);
drivers/memory/tegra/tegra20.c
320
mc_writel(mc, value, rst->control);
drivers/memory/tegra/tegra20.c
348
mc_writel(mc, value, rst->control);
drivers/memory/tegra/tegra20.c
461
mc_writel(mc, 0x00000000, MC_STAT_CONTROL);
drivers/memory/tegra/tegra20.c
462
mc_writel(mc, control_0, MC_STAT_EMC_CONTROL_0);
drivers/memory/tegra/tegra20.c
463
mc_writel(mc, control_1, MC_STAT_EMC_CONTROL_1);
drivers/memory/tegra/tegra20.c
464
mc_writel(mc, 0xffffffff, MC_STAT_EMC_CLOCK_LIMIT);
drivers/memory/tegra/tegra20.c
466
mc_writel(mc, EMC_GATHER_ENABLE, MC_STAT_CONTROL);
drivers/memory/tegra/tegra20.c
468
mc_writel(mc, EMC_GATHER_DISABLE, MC_STAT_CONTROL);
drivers/memory/tegra/tegra20.c
759
mc_writel(mc, status, MC_INTSTATUS);
drivers/memory/tegra/tegra210-emc-cc-r21021.c
1409
mc_writel(emc->mc, next->la_scale_regs[i],
drivers/memory/tegra/tegra210-emc-cc-r21021.c
959
mc_writel(emc->mc, values[i], offsets[i]);
drivers/memory/tegra/tegra210-emc-cc-r21021.c
971
mc_writel(emc->mc, next->la_scale_regs[i], la[i]);
drivers/memory/tegra/tegra30-emc.c
574
mc_writel(emc->mc, val, MC_EMEM_ARB_OUTSTANDING_REQ);
drivers/memory/tegra/tegra30-emc.c
575
mc_writel(emc->mc, MC_TIMING_UPDATE, MC_TIMING_CONTROL);
drivers/memory/tegra/tegra30-emc.c
579
mc_writel(emc->mc,
drivers/memory/tegra/tegra30-emc.c
821
mc_writel(emc->mc, emc->mc_override, MC_EMEM_ARB_OVERRIDE);
drivers/memory/tegra/tegra30.c
1288
mc_writel(mc, value, client->regs.la.reg);