mixer_reg_writemask
mixer_reg_writemask(ctx, MXR_STATUS, ~0, MXR_STATUS_SOFT_RESET);
mixer_reg_writemask(ctx, MXR_INT_STATUS, ~0,
mixer_reg_writemask(ctx, MXR_INT_EN, ~0, MXR_INT_EN_VSYNC);
mixer_reg_writemask(ctx, MXR_GRAPHIC_CFG(win),
mixer_reg_writemask(ctx, MXR_STATUS, 0, MXR_STATUS_SYNC_ENABLE);
mixer_reg_writemask(ctx, MXR_CFG, ~0, MXR_CFG_LAYER_UPDATE);
mixer_reg_writemask(ctx, MXR_STATUS, ~0, MXR_STATUS_SYNC_ENABLE);
mixer_reg_writemask(ctx, MXR_CFG, val, MXR_CFG_SCAN_MASK);
mixer_reg_writemask(ctx, MXR_CFG, val, MXR_CFG_RGB_FMT_MASK);
mixer_reg_writemask(ctx, MXR_CFG, val, MXR_CFG_GRP0_ENABLE);
mixer_reg_writemask(ctx, MXR_LAYER_CFG,
mixer_reg_writemask(ctx, MXR_CFG, val, MXR_CFG_GRP1_ENABLE);
mixer_reg_writemask(ctx, MXR_LAYER_CFG,
mixer_reg_writemask(ctx, MXR_CFG, val,
mixer_reg_writemask(ctx, MXR_LAYER_CFG,
mixer_reg_writemask(ctx, MXR_STATUS, ~0, MXR_STATUS_REG_RUN);
mixer_reg_writemask(ctx, MXR_STATUS, 0, MXR_STATUS_REG_RUN);
mixer_reg_writemask(ctx, MXR_GRAPHIC_CFG(win),
mixer_reg_writemask(ctx, MXR_CFG, MXR_CFG_DST_HDMI, MXR_CFG_DST_MASK);
mixer_reg_writemask(ctx, MXR_CFG, MXR_CFG_OUT_RGB888, MXR_CFG_OUT_MASK);
mixer_reg_writemask(ctx, MXR_STATUS, MXR_STATUS_16_BURST,
mixer_reg_writemask(ctx, MXR_CFG, 0, MXR_CFG_GRP0_ENABLE);
mixer_reg_writemask(ctx, MXR_CFG, 0, MXR_CFG_GRP1_ENABLE);
mixer_reg_writemask(ctx, MXR_CFG, 0, MXR_CFG_VP_ENABLE);
mixer_reg_writemask(mixer_ctx, MXR_INT_STATUS, ~0, MXR_INT_CLEAR_VSYNC);
mixer_reg_writemask(mixer_ctx, MXR_INT_EN, ~0, MXR_INT_EN_VSYNC);
mixer_reg_writemask(mixer_ctx, MXR_INT_STATUS, ~0, MXR_INT_CLEAR_VSYNC);
mixer_reg_writemask(mixer_ctx, MXR_INT_EN, 0, MXR_INT_EN_VSYNC);