CLK_SCLK_SPI0
GATE(CLK_SCLK_SPI0, "sclk_spi0", "div_spi0_pre",
GATE(CLK_SCLK_SPI0, "sclk_spi0", "div_spi_pre0", SRC_MASK_PERIL1, 16,
GATE(CLK_SCLK_SPI0, "sclk_spi0", "div_spi_pre0",
GATE(CLK_SCLK_SPI0, "sclk_spi0", "dout_spi0_pre",
GATE(CLK_SCLK_SPI0, "sclk_spi0", "sclk_spi0_peric", ENABLE_SCLK_PERIC,
GATE(CLK_SCLK_SPI0, "sclk_spi0", "dout_sclk_spi0",