max17042_write_verify_reg
max17042_write_verify_reg(map, MAX17042_RCOMP0, config->rcomp0);
max17042_write_verify_reg(map, MAX17042_TempCo, config->tcompc0);
max17042_write_verify_reg(map, MAX17042_ICHGTerm, config->ichgt_term);
max17042_write_verify_reg(map, MAX17042_K_empty0,
max17042_write_verify_reg(map, MAX17047_QRTbl00,
max17042_write_verify_reg(map, MAX17047_QRTbl10,
max17042_write_verify_reg(map, MAX17047_QRTbl20,
max17042_write_verify_reg(map, MAX17047_QRTbl30,
max17042_write_verify_reg(map, MAX17042_FullCAP,
max17042_write_verify_reg(map, MAX17042_FullCAPNom,
max17042_write_verify_reg(map, MAX17042_VFSOC0, vfSoc);
max17042_write_verify_reg(map, MAX17042_RemCap, rem_cap);
max17042_write_verify_reg(map, MAX17042_RepCap, rep_cap);
max17042_write_verify_reg(map, MAX17042_dQacc, dq_acc);
max17042_write_verify_reg(map, MAX17042_dPacc, dP_ACC_200);
max17042_write_verify_reg(map, MAX17042_FullCAP,
max17042_write_verify_reg(map, MAX17042_FullCAPNom,