Symbol: mhl_tx_writebm
drivers/gpu/drm/bridge/sii9234.c
311
mhl_tx_writebm(ctx, MHL_TX_TMDS_CCTRL, enable ? ~0 : 0,
drivers/gpu/drm/bridge/sii9234.c
313
mhl_tx_writebm(ctx, MHL_TX_INT_CTRL_REG, enable ? ~0 : 0,
drivers/gpu/drm/bridge/sii9234.c
322
mhl_tx_writebm(ctx, MHL_TX_SRST, ~0, BIT_CBUS_RESET);
drivers/gpu/drm/bridge/sii9234.c
324
mhl_tx_writebm(ctx, MHL_TX_SRST, 0, BIT_CBUS_RESET);
drivers/gpu/drm/bridge/sii9234.c
392
mhl_tx_writebm(ctx, MHL_TX_DISC_CTRL1_REG, 0, 0x01);
drivers/gpu/drm/bridge/sii9234.c
394
mhl_tx_writebm(ctx, MHL_TX_DISC_CTRL6_REG, ~0, USB_ID_OVR);
drivers/gpu/drm/bridge/sii9234.c
395
mhl_tx_writebm(ctx, MHL_TX_DISC_CTRL3_REG, ~0, 0x86);
drivers/gpu/drm/bridge/sii9234.c
397
mhl_tx_writebm(ctx, MHL_TX_INT_CTRL_REG, 0, 0x30);
drivers/gpu/drm/bridge/sii9234.c
404
mhl_tx_writebm(ctx, MHL_TX_DISC_CTRL6_REG, 0, USB_ID_OVR);
drivers/gpu/drm/bridge/sii9234.c
406
mhl_tx_writebm(ctx, MHL_TX_DISC_CTRL1_REG, ~0, 0x01);
drivers/gpu/drm/bridge/sii9234.c
474
mhl_tx_writebm(ctx, MHL_TX_DISC_CTRL1_REG, 0x04, 0x06);
drivers/gpu/drm/bridge/sii9234.c
492
mhl_tx_writebm(ctx, MHL_TX_DISC_CTRL6_REG, ~0, USB_ID_OVR);
drivers/gpu/drm/bridge/sii9234.c
502
mhl_tx_writebm(ctx, MHL_TX_DISC_CTRL3_REG, ~0, 0x86);
drivers/gpu/drm/bridge/sii9234.c
507
mhl_tx_writebm(ctx, MHL_TX_DISC_CTRL4_REG, ~0, 0x8C);
drivers/gpu/drm/bridge/sii9234.c
509
mhl_tx_writebm(ctx, MHL_TX_INT_CTRL_REG, 0, 0x06);
drivers/gpu/drm/bridge/sii9234.c
514
mhl_tx_writebm(ctx, MHL_TX_DISC_CTRL6_REG, 0, USB_ID_OVR);
drivers/gpu/drm/bridge/sii9234.c
535
mhl_tx_writebm(ctx, MHL_TX_DISC_CTRL4_REG, 0, 0xF0);
drivers/gpu/drm/bridge/sii9234.c
536
mhl_tx_writebm(ctx, MHL_TX_DISC_CTRL5_REG, 0, 0x03);
drivers/gpu/drm/bridge/sii9234.c
540
mhl_tx_writebm(ctx, MHL_TX_INT_CTRL_REG, 0, 1 << 5);
drivers/gpu/drm/bridge/sii9234.c
541
mhl_tx_writebm(ctx, MHL_TX_INT_CTRL_REG, ~0, 1 << 4);
drivers/gpu/drm/bridge/sii9234.c
658
mhl_tx_writebm(ctx, MHL_TX_DISC_CTRL4_REG, ~0, 0x8C);
drivers/gpu/drm/bridge/sii9234.c
660
mhl_tx_writebm(ctx, MHL_TX_DISC_CTRL6_REG, ~0, 0x05);
drivers/gpu/drm/bridge/sii9234.c
678
mhl_tx_writebm(ctx, MHL_TX_DISC_CTRL1_REG, ~0, 1);