mfcr
mfcr sp, ss0
mfcr sp, usp
mfcr r13, epsr
mfcr lr, epc
mfcr lr, ss1
mfcr r13, ss2
return mfcr("cr30");
tmp1 = mfcr("cr<1, 2>");
tmp2 = mfcr("cr<2, 2>");
regx = mfcr("cr<1, 2>");
regx = mfcr("cr<2, 2>");
fesr = mfcr("cr<2, 2>");
return mfcr("cr<0, 15>");
return __va(mfcr("cr<29, 15>") & ~BIT(0));
return mfcr("cr<2, 15>");
return mfcr("cr<3, 15>");
return mfcr("cr<4, 15>");
return mfcr("cr<30, 15>");
return mfcr("cr<31, 15>");
mfcr sp, ss0
mfcr lr, psr
mfcr lr, cr14
mfcr lr, cr14
mfcr \rx, cr<0, 15>
mfcr \rx, cr<4, 15>
mfcr \rx, cr<8, 15>
mfcr \rx, cr<29, 15>
mfcr \rx, cr<28, 15>
mfcr r6, cr18
mfcr r6, MSA_SET /* Get MSA */
mfcr r6, cr18
mfcr lr, epc
mfcr lr, epsr
mfcr lr, usp
mfcr lr, cr14
return mfcr("cr23");
return mfcr("cr31");
flags = mfcr("psr");
return mfcr("psr");
cur = mfcr("cr13");
next = mfcr("cr13");
while ((mfcr("cr13") >> 28) != i);
seq_printf(m, "ccr (L1C & MMU): 0x%08x\n", mfcr("cr18"));
childregs->sr = mfcr("psr");
secondary_hint = mfcr("cr31");
secondary_hint2 = mfcr("cr<21, 1>");
secondary_ccr = mfcr("cr18");
secondary_pgd = mfcr("cr<29, 15>");
if (mask & mfcr("cr<29, 0>")) {
mask |= mfcr("cr<29, 0>");
mfcr r10; \
mfcr r12
mfcr r10
mfcr r13 /* save CR in r13 for now */
mfcr r12
mfcr r12
mfcr r9; /* save CR in r9 for now */\
mfcr r13; /* save CR in r13 for now */\
mfcr r13; /* save CR in r13 for now */\
return (u64)mfcr(PTIM_CCVR);
return (u64)mfcr(PTIM_CCVR);
INTCG_base = ioremap(mfcr("cr<31, 14>"),
err = mlxsw_reg_query(mlxsw_hwmon->core, MLXSW_REG(mfcr), mfcr_pl);
err = mlxsw_reg_query(thermal->core, MLXSW_REG(mfcr), mfcr_pl);
MLXSW_REG(mfcr),
MLXSW_REG_DEFINE(mfcr, MLXSW_REG_MFCR_ID, MLXSW_REG_MFCR_LEN);
MLXSW_ITEM32(reg, mfcr, pwm_frequency, 0x00, 0, 7);
MLXSW_ITEM32(reg, mfcr, tacho_active, 0x04, 16, MLXSW_MFCR_TACHOS_MAX);
MLXSW_ITEM32(reg, mfcr, pwm_active, 0x04, 0, MLXSW_MFCR_PWMS_MAX);
MLXSW_REG_ZERO(mfcr, payload);