Symbol: meson_crtc
drivers/gpu/drm/meson/meson_crtc.c
123
struct meson_crtc *meson_crtc = to_meson_crtc(crtc);
drivers/gpu/drm/meson/meson_crtc.c
125
struct meson_drm *priv = meson_crtc->priv;
drivers/gpu/drm/meson/meson_crtc.c
151
struct meson_crtc *meson_crtc = to_meson_crtc(crtc);
drivers/gpu/drm/meson/meson_crtc.c
152
struct meson_drm *priv = meson_crtc->priv;
drivers/gpu/drm/meson/meson_crtc.c
176
struct meson_crtc *meson_crtc = to_meson_crtc(crtc);
drivers/gpu/drm/meson/meson_crtc.c
177
struct meson_drm *priv = meson_crtc->priv;
drivers/gpu/drm/meson/meson_crtc.c
206
struct meson_crtc *meson_crtc = to_meson_crtc(crtc);
drivers/gpu/drm/meson/meson_crtc.c
213
meson_crtc->event = crtc->state->event;
drivers/gpu/drm/meson/meson_crtc.c
222
struct meson_crtc *meson_crtc = to_meson_crtc(crtc);
drivers/gpu/drm/meson/meson_crtc.c
223
struct meson_drm *priv = meson_crtc->priv;
drivers/gpu/drm/meson/meson_crtc.c
315
struct meson_crtc *meson_crtc = to_meson_crtc(priv->crtc);
drivers/gpu/drm/meson/meson_crtc.c
336
if (meson_crtc->enable_osd1_afbc)
drivers/gpu/drm/meson/meson_crtc.c
337
meson_crtc->enable_osd1_afbc(priv);
drivers/gpu/drm/meson/meson_crtc.c
339
if (meson_crtc->disable_osd1_afbc)
drivers/gpu/drm/meson/meson_crtc.c
340
meson_crtc->disable_osd1_afbc(priv);
drivers/gpu/drm/meson/meson_crtc.c
345
meson_crtc->vsync_forced = false;
drivers/gpu/drm/meson/meson_crtc.c
378
if (meson_crtc->enable_osd1)
drivers/gpu/drm/meson/meson_crtc.c
379
meson_crtc->enable_osd1(priv);
drivers/gpu/drm/meson/meson_crtc.c
385
meson_crtc->vsync_forced = true;
drivers/gpu/drm/meson/meson_crtc.c
46
#define to_meson_crtc(x) container_of(x, struct meson_crtc, base)
drivers/gpu/drm/meson/meson_crtc.c
477
priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
480
priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
483
priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
486
priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
489
priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
492
priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
495
priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
498
priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
501
priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
504
priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
507
priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
510
priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
513
priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
516
priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
519
priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
52
struct meson_crtc *meson_crtc = to_meson_crtc(crtc);
drivers/gpu/drm/meson/meson_crtc.c
522
priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
525
priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
528
priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
53
struct meson_drm *priv = meson_crtc->priv;
drivers/gpu/drm/meson/meson_crtc.c
531
priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
534
priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
537
priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
540
priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
543
priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
546
priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
549
priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
55
meson_crtc->vsync_disabled = false;
drivers/gpu/drm/meson/meson_crtc.c
552
priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
555
priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
558
priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
561
priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
564
priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
567
priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
570
priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
573
priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
576
priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
579
priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
582
priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
585
priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
587
writel_relaxed(0, priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
589
writel_relaxed(0, priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
591
writel_relaxed(0, priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
593
writel_relaxed(0, priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
596
priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
599
priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
602
priv->io_base + meson_crtc->viu_offset +
drivers/gpu/drm/meson/meson_crtc.c
63
struct meson_crtc *meson_crtc = to_meson_crtc(crtc);
drivers/gpu/drm/meson/meson_crtc.c
64
struct meson_drm *priv = meson_crtc->priv;
drivers/gpu/drm/meson/meson_crtc.c
654
if (meson_crtc->enable_vd1)
drivers/gpu/drm/meson/meson_crtc.c
655
meson_crtc->enable_vd1(priv);
drivers/gpu/drm/meson/meson_crtc.c
66
if (!meson_crtc->vsync_forced) {
drivers/gpu/drm/meson/meson_crtc.c
660
if (meson_crtc->vsync_disabled)
drivers/gpu/drm/meson/meson_crtc.c
666
if (meson_crtc->event) {
drivers/gpu/drm/meson/meson_crtc.c
667
drm_crtc_send_vblank_event(priv->crtc, meson_crtc->event);
drivers/gpu/drm/meson/meson_crtc.c
669
meson_crtc->event = NULL;
drivers/gpu/drm/meson/meson_crtc.c
67
meson_crtc->vsync_disabled = true;
drivers/gpu/drm/meson/meson_crtc.c
676
struct meson_crtc *meson_crtc;
drivers/gpu/drm/meson/meson_crtc.c
680
meson_crtc = devm_kzalloc(priv->drm->dev, sizeof(*meson_crtc),
drivers/gpu/drm/meson/meson_crtc.c
682
if (!meson_crtc)
drivers/gpu/drm/meson/meson_crtc.c
685
meson_crtc->priv = priv;
drivers/gpu/drm/meson/meson_crtc.c
686
crtc = &meson_crtc->base;
drivers/gpu/drm/meson/meson_crtc.c
696
meson_crtc->enable_osd1 = meson_g12a_crtc_enable_osd1;
drivers/gpu/drm/meson/meson_crtc.c
697
meson_crtc->enable_vd1 = meson_g12a_crtc_enable_vd1;
drivers/gpu/drm/meson/meson_crtc.c
698
meson_crtc->viu_offset = MESON_G12A_VIU_OFFSET;
drivers/gpu/drm/meson/meson_crtc.c
699
meson_crtc->enable_osd1_afbc =
drivers/gpu/drm/meson/meson_crtc.c
701
meson_crtc->disable_osd1_afbc =
drivers/gpu/drm/meson/meson_crtc.c
705
meson_crtc->enable_osd1 = meson_crtc_enable_osd1;
drivers/gpu/drm/meson/meson_crtc.c
706
meson_crtc->enable_vd1 = meson_crtc_enable_vd1;
drivers/gpu/drm/meson/meson_crtc.c
708
meson_crtc->enable_osd1_afbc =
drivers/gpu/drm/meson/meson_crtc.c
710
meson_crtc->disable_osd1_afbc =
drivers/gpu/drm/meson/meson_crtc.c
87
struct meson_crtc *meson_crtc = to_meson_crtc(crtc);
drivers/gpu/drm/meson/meson_crtc.c
89
struct meson_drm *priv = meson_crtc->priv;