CLK_PMU
GATE(CLK_PMU, "clk_pmu", "xin24m", CLK_IGNORE_UNUSED,
GATE(CLK_PMU, "clk_pmu", "xin24m", 0,
GATE(CLK_PMU, "clk_pmu", "xin24m", CLK_IGNORE_UNUSED,
GATE(CLK_PMU, "pmu", "div_aclk66", GATE_IP_PERIS, 2, CLK_IGNORE_UNUSED,
[CLK_PMU] = &pmu_clk.common.hw,