drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c

126

struct mdp5_encoder *mdp5_cmd_enc = to_mdp5_encoder(encoder);

drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c

144

struct mdp5_encoder *mdp5_cmd_enc = to_mdp5_encoder(encoder);

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

115

spin_unlock_irqrestore(&mdp5_encoder->intf_lock, flags);

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

122

struct mdp5_encoder *mdp5_encoder = to_mdp5_encoder(encoder);

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

124

struct mdp5_ctl *ctl = mdp5_encoder->ctl;

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

127

struct mdp5_interface *intf = mdp5_encoder->intf;

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

128

int intfn = mdp5_encoder->intf->num;

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

131

if (WARN_ON(!mdp5_encoder->enabled))

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

136

spin_lock_irqsave(&mdp5_encoder->intf_lock, flags);

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

138

spin_unlock_irqrestore(&mdp5_encoder->intf_lock, flags);

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

151

mdp5_encoder->enabled = false;

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

156

struct mdp5_encoder *mdp5_encoder = to_mdp5_encoder(encoder);

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

158

struct mdp5_ctl *ctl = mdp5_encoder->ctl;

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

159

struct mdp5_interface *intf = mdp5_encoder->intf;

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

164

if (WARN_ON(mdp5_encoder->enabled))

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

167

spin_lock_irqsave(&mdp5_encoder->intf_lock, flags);

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

169

spin_unlock_irqrestore(&mdp5_encoder->intf_lock, flags);

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

174

mdp5_encoder->enabled = true;

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

181

struct mdp5_encoder *mdp5_encoder = to_mdp5_encoder(encoder);

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

182

struct mdp5_interface *intf = mdp5_encoder->intf;

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

192

struct mdp5_encoder *mdp5_encoder = to_mdp5_encoder(encoder);

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

193

struct mdp5_interface *intf = mdp5_encoder->intf;

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

203

struct mdp5_encoder *mdp5_encoder = to_mdp5_encoder(encoder);

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

204

struct mdp5_interface *intf = mdp5_encoder->intf;

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

220

struct mdp5_encoder *mdp5_encoder = to_mdp5_encoder(encoder);

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

222

struct mdp5_interface *intf = mdp5_encoder->intf;

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

223

struct mdp5_ctl *ctl = mdp5_encoder->ctl;

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

23

struct mdp5_encoder *mdp5_encoder = to_mdp5_encoder(encoder);

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

250

struct mdp5_encoder *mdp5_encoder = to_mdp5_encoder(encoder);

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

252

int intf = mdp5_encoder->intf->num;

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

259

struct mdp5_encoder *mdp5_encoder = to_mdp5_encoder(encoder);

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

261

int intf = mdp5_encoder->intf->num;

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

268

struct mdp5_encoder *mdp5_encoder = to_mdp5_encoder(encoder);

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

269

struct mdp5_interface *intf = mdp5_encoder->intf;

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

27

int intf = mdp5_encoder->intf->num;

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

289

struct mdp5_encoder *mdp5_encoder;

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

293

mdp5_encoder = drmm_encoder_alloc(dev, struct mdp5_encoder, base,

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

295

if (IS_ERR(mdp5_encoder))

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

296

return ERR_CAST(mdp5_encoder);

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

298

encoder = &mdp5_encoder->base;

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

299

mdp5_encoder->ctl = ctl;

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

300

mdp5_encoder->intf = intf;

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

302

spin_lock_init(&mdp5_encoder->intf_lock);

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

41

if (mdp5_encoder->intf->type != INTF_DSI) {

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

86

if (mdp5_encoder->intf->type == INTF_eDP) {

drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c

91

spin_lock_irqsave(&mdp5_encoder->intf_lock, flags);

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h

169

#define to_mdp5_encoder(x) container_of(x, struct mdp5_encoder, base)