drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

162

calc_pll(struct mcp77_clk *clk, u32 reg,

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

202

struct mcp77_clk *clk = mcp77_clk(base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

24

#define mcp77_clk(p) container_of((p), struct mcp77_clk, base)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

298

struct mcp77_clk *clk = mcp77_clk(base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

396

mcp77_clk = {

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

415

struct mcp77_clk *clk;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

42

read_div(struct mcp77_clk *clk)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

421

return nvkm_clk_ctor(&mcp77_clk, device, type, inst, true, &clk->base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

49

read_pll(struct mcp77_clk *clk, u32 base)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

83

struct mcp77_clk *clk = mcp77_clk(base);