mcf_mapirq2imr
mcf_mapirq2imr(MCF_IRQ_UART0, MCFINTC_UART0);
mcf_mapirq2imr(MCF_IRQ_UART1, MCFINTC_UART1);
mcf_mapirq2imr(MCF_IRQ_I2C0, MCFINTC_I2C);
mcf_mapirq2imr(25, MCFINTC_EINT1);
mcf_mapirq2imr(28, MCFINTC_EINT4);
mcf_mapirq2imr(31, MCFINTC_EINT7);
mcf_mapirq2imr(MCF_IRQ_QSPI, MCFINTC_QSPI);
mcf_mapirq2imr(MCF_IRQ_I2C0, MCFINTC_I2C);
mcf_mapirq2imr(MCF_IRQ_QSPI, MCFINTC_QSPI);
mcf_mapirq2imr(MCF_IRQ_I2C0, MCFINTC_I2C);
mcf_mapirq2imr(MCF_IRQ_I2C0, MCFINTC_I2C);
mcf_mapirq2imr(25, MCFINTC_EINT1);
mcf_mapirq2imr(27, MCFINTC_EINT3);
mcf_mapirq2imr(29, MCFINTC_EINT5);
mcf_mapirq2imr(31, MCFINTC_EINT7);
mcf_mapirq2imr(MCF_IRQ_I2C0, MCFINTC_I2C);
mcf_mapirq2imr(25, MCFINTC_EINT1);
mcf_mapirq2imr(27, MCFINTC_EINT3);
mcf_mapirq2imr(29, MCFINTC_EINT5);
mcf_mapirq2imr(31, MCFINTC_EINT7);
mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);
mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);