arch/mips/include/asm/octeon/cvmx-sriox-defs.h

1017

uint64_t mce:1;

arch/mips/include/asm/octeon/cvmx-sriox-defs.h

1019

uint64_t mce:1;

arch/powerpc/include/asm/mce.h

230

extern int get_mce_event(struct machine_check_event *mce, bool release);

arch/powerpc/kernel/mce.c

109

mce->version = MCE_V1;

arch/powerpc/kernel/mce.c

110

mce->srr0 = nip;

arch/powerpc/kernel/mce.c

111

mce->srr1 = regs->msr;

arch/powerpc/kernel/mce.c

112

mce->gpr3 = regs->gpr[3];

arch/powerpc/kernel/mce.c

113

mce->in_use = 1;

arch/powerpc/kernel/mce.c

114

mce->cpu = get_paca()->paca_index;

arch/powerpc/kernel/mce.c

118

mce->disposition = MCE_DISPOSITION_RECOVERED;

arch/powerpc/kernel/mce.c

120

mce->disposition = MCE_DISPOSITION_NOT_RECOVERED;

arch/powerpc/kernel/mce.c

122

mce->initiator = mce_err->initiator;

arch/powerpc/kernel/mce.c

123

mce->severity = mce_err->severity;

arch/powerpc/kernel/mce.c

124

mce->sync_error = mce_err->sync_error;

arch/powerpc/kernel/mce.c

125

mce->error_class = mce_err->error_class;

arch/powerpc/kernel/mce.c

130

mce_set_error_info(mce, mce_err);

arch/powerpc/kernel/mce.c

131

if (mce->error_type == MCE_ERROR_TYPE_UE)

arch/powerpc/kernel/mce.c

132

mce->u.ue_error.ignore_event = mce_err->ignore_event;

arch/powerpc/kernel/mce.c

138

if (mce->disposition == MCE_DISPOSITION_NOT_RECOVERED)

arch/powerpc/kernel/mce.c

144

if (mce->error_type == MCE_ERROR_TYPE_TLB) {

arch/powerpc/kernel/mce.c

145

mce->u.tlb_error.effective_address_provided = true;

arch/powerpc/kernel/mce.c

146

mce->u.tlb_error.effective_address = addr;

arch/powerpc/kernel/mce.c

147

} else if (mce->error_type == MCE_ERROR_TYPE_SLB) {

arch/powerpc/kernel/mce.c

148

mce->u.slb_error.effective_address_provided = true;

arch/powerpc/kernel/mce.c

149

mce->u.slb_error.effective_address = addr;

arch/powerpc/kernel/mce.c

150

} else if (mce->error_type == MCE_ERROR_TYPE_ERAT) {

arch/powerpc/kernel/mce.c

151

mce->u.erat_error.effective_address_provided = true;

arch/powerpc/kernel/mce.c

152

mce->u.erat_error.effective_address = addr;

arch/powerpc/kernel/mce.c

153

} else if (mce->error_type == MCE_ERROR_TYPE_USER) {

arch/powerpc/kernel/mce.c

154

mce->u.user_error.effective_address_provided = true;

arch/powerpc/kernel/mce.c

155

mce->u.user_error.effective_address = addr;

arch/powerpc/kernel/mce.c

156

} else if (mce->error_type == MCE_ERROR_TYPE_RA) {

arch/powerpc/kernel/mce.c

157

mce->u.ra_error.effective_address_provided = true;

arch/powerpc/kernel/mce.c

158

mce->u.ra_error.effective_address = addr;

arch/powerpc/kernel/mce.c

159

} else if (mce->error_type == MCE_ERROR_TYPE_LINK) {

arch/powerpc/kernel/mce.c

160

mce->u.link_error.effective_address_provided = true;

arch/powerpc/kernel/mce.c

161

mce->u.link_error.effective_address = addr;

arch/powerpc/kernel/mce.c

162

} else if (mce->error_type == MCE_ERROR_TYPE_UE) {

arch/powerpc/kernel/mce.c

163

mce->u.ue_error.effective_address_provided = true;

arch/powerpc/kernel/mce.c

164

mce->u.ue_error.effective_address = addr;

arch/powerpc/kernel/mce.c

166

mce->u.ue_error.physical_address_provided = true;

arch/powerpc/kernel/mce.c

167

mce->u.ue_error.physical_address = phys_addr;

arch/powerpc/kernel/mce.c

168

machine_check_ue_event(mce);

arch/powerpc/kernel/mce.c

191

int get_mce_event(struct machine_check_event *mce, bool release)

arch/powerpc/kernel/mce.c

205

if (mce)

arch/powerpc/kernel/mce.c

206

*mce = *mc_evt;

arch/powerpc/kernel/mce.c

49

static void mce_set_error_info(struct machine_check_event *mce,

arch/powerpc/kernel/mce.c

52

mce->error_type = mce_err->error_type;

arch/powerpc/kernel/mce.c

55

mce->u.ue_error.ue_error_type = mce_err->u.ue_error_type;

arch/powerpc/kernel/mce.c

58

mce->u.slb_error.slb_error_type = mce_err->u.slb_error_type;

arch/powerpc/kernel/mce.c

61

mce->u.erat_error.erat_error_type = mce_err->u.erat_error_type;

arch/powerpc/kernel/mce.c

64

mce->u.tlb_error.tlb_error_type = mce_err->u.tlb_error_type;

arch/powerpc/kernel/mce.c

67

mce->u.user_error.user_error_type = mce_err->u.user_error_type;

arch/powerpc/kernel/mce.c

70

mce->u.ra_error.ra_error_type = mce_err->u.ra_error_type;

arch/powerpc/kernel/mce.c

73

mce->u.link_error.link_error_type = mce_err->u.link_error_type;

arch/powerpc/kernel/mce.c

97

struct machine_check_event *mce;

arch/powerpc/kernel/mce.c

99

mce = &local_paca->mce_info->mce_event[index];

arch/x86/include/asm/mce.h

188

struct mce entry[];

arch/x86/include/asm/mce.h

218

struct mce m;

arch/x86/include/asm/mce.h

228

#define to_mce_hw_err(mce) container_of(mce, struct mce_hw_err, m)

arch/x86/include/asm/mce.h

290

bool mce_is_memory_error(struct mce *m);

arch/x86/include/asm/mce.h

291

bool mce_is_correctable(struct mce *m);

arch/x86/include/asm/mce.h

292

bool mce_usable_address(struct mce *m);

arch/x86/include/asm/mce.h

308

DECLARE_PER_CPU(struct mce, injectm);

arch/x86/include/asm/mce.h

387

extern bool amd_mce_is_memory_error(struct mce *m);

arch/x86/include/asm/mce.h

392

static inline bool amd_mce_is_memory_error(struct mce *m) { return false; };

arch/x86/include/asm/tdx.h

150

const char *tdx_dump_mce_info(struct mce *m);

arch/x86/include/asm/tdx.h

229

static inline const char *tdx_dump_mce_info(struct mce *m) { return NULL; }

arch/x86/kernel/cpu/mce/amd.c

602

bool amd_filter_mce(struct mce *m)

arch/x86/kernel/cpu/mce/amd.c

768

static bool legacy_mce_is_memory_error(struct mce *m)

arch/x86/kernel/cpu/mce/amd.c

777

static bool smca_mce_is_memory_error(struct mce *m)

arch/x86/kernel/cpu/mce/amd.c

789

bool amd_mce_is_memory_error(struct mce *m)

arch/x86/kernel/cpu/mce/amd.c

819

bool amd_mce_usable_address(struct mce *m)

arch/x86/kernel/cpu/mce/amd.c

874

void amd_clear_bank(struct mce *m)

arch/x86/kernel/cpu/mce/apei.c

190

struct mce mce;

arch/x86/kernel/cpu/mce/apei.c

193

int apei_write_mce(struct mce *m)

arch/x86/kernel/cpu/mce/apei.c

211

rcd.sec_hdr.section_offset = (void *)&rcd.mce - (void *)&rcd;

arch/x86/kernel/cpu/mce/apei.c

212

rcd.sec_hdr.section_length = sizeof(rcd.mce);

arch/x86/kernel/cpu/mce/apei.c

220

memcpy(&rcd.mce, m, sizeof(*m));

arch/x86/kernel/cpu/mce/apei.c

225

ssize_t apei_read_mce(struct mce *m, u64 *record_id)

arch/x86/kernel/cpu/mce/apei.c

248

memcpy(m, &rcd.mce, sizeof(*m));

arch/x86/kernel/cpu/mce/apei.c

32

struct mce *m;

arch/x86/kernel/cpu/mce/apei.c

74

struct mce *m;

arch/x86/kernel/cpu/mce/core.c

1103

struct mce *m = NULL;

arch/x86/kernel/cpu/mce/core.c

1115

struct mce *mtmp = &etmp->m;

arch/x86/kernel/cpu/mce/core.c

121

void mce_prep_record_common(struct mce *m)

arch/x86/kernel/cpu/mce/core.c

130

void mce_prep_record_per_cpu(unsigned int cpu, struct mce *m)

arch/x86/kernel/cpu/mce/core.c

1364

struct mce *m = &err->m;

arch/x86/kernel/cpu/mce/core.c

143

struct mce *m = &err->m;

arch/x86/kernel/cpu/mce/core.c

1492

struct mce *m = &err->m;

arch/x86/kernel/cpu/mce/core.c

150

DEFINE_PER_CPU(struct mce, injectm);

arch/x86/kernel/cpu/mce/core.c

1562

struct mce *m;

arch/x86/kernel/cpu/mce/core.c

178

struct mce *m = &err->m;

arch/x86/kernel/cpu/mce/core.c

2124

bool filter_mce(struct mce *m)

arch/x86/kernel/cpu/mce/core.c

227

struct mce *m = &err->m;

arch/x86/kernel/cpu/mce/core.c

256

static const char *mce_dump_aux_info(struct mce *m)

arch/x86/kernel/cpu/mce/core.c

296

struct mce *m = &err->m;

arch/x86/kernel/cpu/mce/core.c

306

struct mce *m = &err->m;

arch/x86/kernel/cpu/mce/core.c

360

return offsetof(struct mce, ip);

arch/x86/kernel/cpu/mce/core.c

362

return offsetof(struct mce, status);

arch/x86/kernel/cpu/mce/core.c

364

return offsetof(struct mce, addr);

arch/x86/kernel/cpu/mce/core.c

366

return offsetof(struct mce, misc);

arch/x86/kernel/cpu/mce/core.c

368

return offsetof(struct mce, mcgstatus);

arch/x86/kernel/cpu/mce/core.c

462

struct mce *m;

arch/x86/kernel/cpu/mce/core.c

514

bool mce_usable_address(struct mce *m)

arch/x86/kernel/cpu/mce/core.c

533

bool mce_is_memory_error(struct mce *m)

arch/x86/kernel/cpu/mce/core.c

565

static bool whole_page(struct mce *m)

arch/x86/kernel/cpu/mce/core.c

573

bool mce_is_correctable(struct mce *m)

arch/x86/kernel/cpu/mce/core.c

636

struct mce *mce = (struct mce *)data;

arch/x86/kernel/cpu/mce/core.c

639

if (!mce || !mce_usable_address(mce))

arch/x86/kernel/cpu/mce/core.c

642

if (mce->severity != MCE_AO_SEVERITY &&

arch/x86/kernel/cpu/mce/core.c

643

mce->severity != MCE_DEFERRED_SEVERITY)

arch/x86/kernel/cpu/mce/core.c

646

pfn = (mce->addr & MCI_ADDR_PHYSADDR) >> PAGE_SHIFT;

arch/x86/kernel/cpu/mce/core.c

649

mce->kflags |= MCE_HANDLED_UC;

arch/x86/kernel/cpu/mce/core.c

685

struct mce *m = &err->m;

arch/x86/kernel/cpu/mce/core.c

730

static bool smca_should_log_poll_error(struct mce *m)

arch/x86/kernel/cpu/mce/core.c

750

static bool ser_should_log_poll_error(struct mce *m)

arch/x86/kernel/cpu/mce/core.c

768

struct mce *m = &err->m;

arch/x86/kernel/cpu/mce/core.c

793

static void clear_bank(struct mce *m)

arch/x86/kernel/cpu/mce/core.c

820

struct mce *m;

arch/x86/kernel/cpu/mce/core.c

893

quirk_sandybridge_ifu(int bank, struct mce *m, struct pt_regs *regs)

arch/x86/kernel/cpu/mce/core.c

976

static __always_inline void quirk_zen_ifu(int bank, struct mce *m, struct pt_regs *regs)

arch/x86/kernel/cpu/mce/core.c

993

struct mce *m = &err->m;

arch/x86/kernel/cpu/mce/dev-mcelog.c

166

struct mce m;

arch/x86/kernel/cpu/mce/dev-mcelog.c

168

if (usize < sizeof(struct mce))

arch/x86/kernel/cpu/mce/dev-mcelog.c

184

if (copy_to_user(*ubuf, &m, sizeof(struct mce)))

arch/x86/kernel/cpu/mce/dev-mcelog.c

197

*ubuf += sizeof(struct mce);

arch/x86/kernel/cpu/mce/dev-mcelog.c

219

if (*off != 0 || usize < mcelog->len * sizeof(struct mce))

arch/x86/kernel/cpu/mce/dev-mcelog.c

226

struct mce *m = &mcelog->entry[i];

arch/x86/kernel/cpu/mce/dev-mcelog.c

232

memset(mcelog->entry, 0, next * sizeof(struct mce));

arch/x86/kernel/cpu/mce/dev-mcelog.c

264

return put_user(sizeof(struct mce), p);

arch/x86/kernel/cpu/mce/dev-mcelog.c

289

struct mce m;

arch/x86/kernel/cpu/mce/dev-mcelog.c

300

if ((unsigned long)usize > sizeof(struct mce))

arch/x86/kernel/cpu/mce/dev-mcelog.c

301

usize = sizeof(struct mce);

arch/x86/kernel/cpu/mce/dev-mcelog.c

347

mcelog->recordlen = sizeof(struct mce);

arch/x86/kernel/cpu/mce/dev-mcelog.c

39

struct mce *mce = (struct mce *)data;

arch/x86/kernel/cpu/mce/dev-mcelog.c

42

if (mce->kflags & MCE_HANDLED_CEC)

arch/x86/kernel/cpu/mce/dev-mcelog.c

60

memcpy(mcelog->entry + entry, mce, sizeof(struct mce));

arch/x86/kernel/cpu/mce/dev-mcelog.c

71

mce->kflags |= MCE_HANDLED_MCELOG;

arch/x86/kernel/cpu/mce/genpool.c

78

struct mce *mce;

arch/x86/kernel/cpu/mce/genpool.c

86

mce = &node->err.m;

arch/x86/kernel/cpu/mce/genpool.c

87

blocking_notifier_call_chain(&x86_mce_decoder_chain, 0, mce);

arch/x86/kernel/cpu/mce/inject.c

104

struct mce *m = (struct mce *)data;

arch/x86/kernel/cpu/mce/inject.c

116

static void setup_inj_struct(struct mce *m)

arch/x86/kernel/cpu/mce/inject.c

118

memset(m, 0, sizeof(struct mce));

arch/x86/kernel/cpu/mce/inject.c

127

static void inject_mce(struct mce *m)

arch/x86/kernel/cpu/mce/inject.c

129

struct mce *i = &per_cpu(injectm, m->extcpu);

arch/x86/kernel/cpu/mce/inject.c

139

memcpy(i, m, sizeof(struct mce));

arch/x86/kernel/cpu/mce/inject.c

145

static void raise_poll(struct mce *m)

arch/x86/kernel/cpu/mce/inject.c

157

static void raise_exception(struct mce *m, struct pt_regs *pregs)

arch/x86/kernel/cpu/mce/inject.c

181

struct mce *m = this_cpu_ptr(&injectm);

arch/x86/kernel/cpu/mce/inject.c

195

struct mce *m = this_cpu_ptr(&injectm);

arch/x86/kernel/cpu/mce/inject.c

207

struct mce *m = this_cpu_ptr(&injectm);

arch/x86/kernel/cpu/mce/inject.c

240

static void __maybe_unused raise_mce(struct mce *m)

arch/x86/kernel/cpu/mce/inject.c

257

struct mce *mcpu = &per_cpu(injectm, cpu);

arch/x86/kernel/cpu/mce/inject.c

297

struct mce *m = (struct mce *)data;

arch/x86/kernel/cpu/mce/inject.c

404

struct mce *m = (struct mce *)data;

arch/x86/kernel/cpu/mce/inject.c

42

static struct mce i_mce;

arch/x86/kernel/cpu/mce/inject.c

476

struct mce m = *(struct mce *)info;

arch/x86/kernel/cpu/mce/inject.c

588

struct mce *m = (struct mce *)data;

arch/x86/kernel/cpu/mce/inject.c

70

struct mce *m = (struct mce *)data; \

arch/x86/kernel/cpu/mce/inject.c

84

struct mce *m = (struct mce *)data; \

arch/x86/kernel/cpu/mce/intel.c

502

bool intel_filter_mce(struct mce *m)

arch/x86/kernel/cpu/mce/intel.c

525

bool intel_mce_usable_address(struct mce *m)

arch/x86/kernel/cpu/mce/internal.h

122

int apei_write_mce(struct mce *m);

arch/x86/kernel/cpu/mce/internal.h

123

ssize_t apei_read_mce(struct mce *m, u64 *record_id);

arch/x86/kernel/cpu/mce/internal.h

127

static inline int apei_write_mce(struct mce *m)

arch/x86/kernel/cpu/mce/internal.h

131

static inline ssize_t apei_read_mce(struct mce *m, u64 *record_id)

arch/x86/kernel/cpu/mce/internal.h

151

static inline bool mce_cmp(struct mce *m1, struct mce *m2)

arch/x86/kernel/cpu/mce/internal.h

265

extern bool filter_mce(struct mce *m);

arch/x86/kernel/cpu/mce/internal.h

266

void mce_prep_record_common(struct mce *m);

arch/x86/kernel/cpu/mce/internal.h

267

void mce_prep_record_per_cpu(unsigned int cpu, struct mce *m);

arch/x86/kernel/cpu/mce/internal.h

273

extern bool amd_filter_mce(struct mce *m);

arch/x86/kernel/cpu/mce/internal.h

274

bool amd_mce_usable_address(struct mce *m);

arch/x86/kernel/cpu/mce/internal.h

275

void amd_clear_bank(struct mce *m);

arch/x86/kernel/cpu/mce/internal.h

281

static __always_inline void smca_extract_err_addr(struct mce *m)

arch/x86/kernel/cpu/mce/internal.h

306

static inline bool amd_filter_mce(struct mce *m) { return false; }

arch/x86/kernel/cpu/mce/internal.h

307

static inline bool amd_mce_usable_address(struct mce *m) { return false; }

arch/x86/kernel/cpu/mce/internal.h

308

static inline void amd_clear_bank(struct mce *m) { }

arch/x86/kernel/cpu/mce/internal.h

309

static inline void smca_extract_err_addr(struct mce *m) { }

arch/x86/kernel/cpu/mce/internal.h

38

int mce_severity(struct mce *a, struct pt_regs *regs, char **msg, bool is_excp);

arch/x86/kernel/cpu/mce/internal.h

49

bool intel_filter_mce(struct mce *m);

arch/x86/kernel/cpu/mce/internal.h

50

bool intel_mce_usable_address(struct mce *m);

arch/x86/kernel/cpu/mce/internal.h

57

static inline bool intel_filter_mce(struct mce *m) { return false; }

arch/x86/kernel/cpu/mce/internal.h

58

static inline bool intel_mce_usable_address(struct mce *m) { return false; }

arch/x86/kernel/cpu/mce/internal.h

66

void mce_track_storm(struct mce *mce);

arch/x86/kernel/cpu/mce/internal.h

74

static inline void mce_track_storm(struct mce *mce) {}

arch/x86/kernel/cpu/mce/severity.c

286

static noinstr int error_context(struct mce *m, struct pt_regs *regs)

arch/x86/kernel/cpu/mce/severity.c

320

static noinstr int mce_severity_amd(struct mce *m, struct pt_regs *regs, char **msg, bool is_excp)

arch/x86/kernel/cpu/mce/severity.c

380

static noinstr int mce_severity_intel(struct mce *m, struct pt_regs *regs, char **msg, bool is_excp)

arch/x86/kernel/cpu/mce/severity.c

413

int noinstr mce_severity(struct mce *m, struct pt_regs *regs, char **msg, bool is_excp)

arch/x86/kernel/cpu/mce/threshold.c

114

void mce_track_storm(struct mce *mce)

arch/x86/kernel/cpu/mce/threshold.c

122

if (storm->banks[mce->bank].poll_only)

arch/x86/kernel/cpu/mce/threshold.c

133

if (!storm->banks[mce->bank].in_storm_mode) {

arch/x86/kernel/cpu/mce/threshold.c

134

delta = now - storm->banks[mce->bank].timestamp;

arch/x86/kernel/cpu/mce/threshold.c

140

history = storm->banks[mce->bank].history << shift;

arch/x86/kernel/cpu/mce/threshold.c

142

storm->banks[mce->bank].timestamp = now;

arch/x86/kernel/cpu/mce/threshold.c

145

if ((mce->status & MCI_STATUS_VAL) && mce_is_correctable(mce))

arch/x86/kernel/cpu/mce/threshold.c

148

storm->banks[mce->bank].history = history;

arch/x86/kernel/cpu/mce/threshold.c

150

if (storm->banks[mce->bank].in_storm_mode) {

arch/x86/kernel/cpu/mce/threshold.c

153

printk_deferred(KERN_NOTICE "CPU%d BANK%d CMCI storm subsided\n", smp_processor_id(), mce->bank);

arch/x86/kernel/cpu/mce/threshold.c

154

mce_handle_storm(mce->bank, false);

arch/x86/kernel/cpu/mce/threshold.c

155

cmci_storm_end(mce->bank);

arch/x86/kernel/cpu/mce/threshold.c

159

printk_deferred(KERN_NOTICE "CPU%d BANK%d CMCI storm detected\n", smp_processor_id(), mce->bank);

arch/x86/kernel/cpu/mce/threshold.c

160

mce_handle_storm(mce->bank, true);

arch/x86/kernel/cpu/mce/threshold.c

161

cmci_storm_begin(mce->bank);

arch/x86/kvm/x86.c

5454

static bool is_ucna(struct kvm_x86_mce *mce)

arch/x86/kvm/x86.c

5456

return !mce->mcg_status &&

arch/x86/kvm/x86.c

5457

!(mce->status & (MCI_STATUS_PCC | MCI_STATUS_S | MCI_STATUS_AR)) &&

arch/x86/kvm/x86.c

5458

(mce->status & MCI_STATUS_VAL) &&

arch/x86/kvm/x86.c

5459

(mce->status & MCI_STATUS_UC);

arch/x86/kvm/x86.c

5462

static int kvm_vcpu_x86_set_ucna(struct kvm_vcpu *vcpu, struct kvm_x86_mce *mce, u64* banks)

arch/x86/kvm/x86.c

5466

banks[1] = mce->status;

arch/x86/kvm/x86.c

5467

banks[2] = mce->addr;

arch/x86/kvm/x86.c

5468

banks[3] = mce->misc;

arch/x86/kvm/x86.c

5469

vcpu->arch.mcg_status = mce->mcg_status;

arch/x86/kvm/x86.c

5472

!(vcpu->arch.mci_ctl2_banks[mce->bank] & MCI_CTL2_CMCI_EN))

arch/x86/kvm/x86.c

5482

struct kvm_x86_mce *mce)

arch/x86/kvm/x86.c

5488

if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))

arch/x86/kvm/x86.c

5491

banks += array_index_nospec(4 * mce->bank, 4 * bank_num);

arch/x86/kvm/x86.c

5493

if (is_ucna(mce))

arch/x86/kvm/x86.c

5494

return kvm_vcpu_x86_set_ucna(vcpu, mce, banks);

arch/x86/kvm/x86.c

5500

if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&

arch/x86/kvm/x86.c

5507

if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)

arch/x86/kvm/x86.c

5509

if (mce->status & MCI_STATUS_UC) {

arch/x86/kvm/x86.c

5516

mce->status |= MCI_STATUS_OVER;

arch/x86/kvm/x86.c

5517

banks[2] = mce->addr;

arch/x86/kvm/x86.c

5518

banks[3] = mce->misc;

arch/x86/kvm/x86.c

5519

vcpu->arch.mcg_status = mce->mcg_status;

arch/x86/kvm/x86.c

5520

banks[1] = mce->status;

arch/x86/kvm/x86.c

5525

mce->status |= MCI_STATUS_OVER;

arch/x86/kvm/x86.c

5526

banks[2] = mce->addr;

arch/x86/kvm/x86.c

5527

banks[3] = mce->misc;

arch/x86/kvm/x86.c

5528

banks[1] = mce->status;

arch/x86/kvm/x86.c

6351

struct kvm_x86_mce mce;

arch/x86/kvm/x86.c

6354

if (copy_from_user(&mce, argp, sizeof(mce)))

arch/x86/kvm/x86.c

6356

r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);

arch/x86/virt/vmx/tdx/tdx.c

1311

const char *tdx_dump_mce_info(struct mce *m)

drivers/acpi/acpi_extlog.c

186

struct mce *mce = (struct mce *)data;

drivers/acpi/acpi_extlog.c

187

int bank = mce->bank;

drivers/acpi/acpi_extlog.c

188

int cpu = mce->extcpu;

drivers/acpi/acpi_extlog.c

200

if (mce->kflags & MCE_HANDLED_CEC) {

drivers/acpi/acpi_extlog.c

254

mce->kflags |= MCE_HANDLED_EXTLOG;

drivers/acpi/nfit/mce.c

16

struct mce *mce = (struct mce *)data;

drivers/acpi/nfit/mce.c

21

if (!mce_is_memory_error(mce) || mce_is_correctable(mce))

drivers/acpi/nfit/mce.c

25

if (!mce_usable_address(mce))

drivers/acpi/nfit/mce.c

35

unsigned int align = 1UL << MCI_MISC_ADDR_LSB(mce->misc);

drivers/acpi/nfit/mce.c

46

if (spa->address > mce->addr)

drivers/acpi/nfit/mce.c

48

if ((spa->address + spa->length - 1) < mce->addr)

drivers/acpi/nfit/mce.c

67

ALIGN_DOWN(mce->addr, align), align);

drivers/acpi/nfit/mce.c

79

mce->kflags |= MCE_HANDLED_NFIT;

drivers/cxl/core/mce.c

17

struct mce *mce = data;

drivers/cxl/core/mce.c

21

if (!mce || !mce_usable_address(mce))

drivers/cxl/core/mce.c

27

spa = mce->addr & MCI_ADDR_PHYSADDR;

drivers/edac/amd64_edac.c

1042

static int fixup_node_id(int node_id, struct mce *m)

drivers/edac/amd64_edac.c

1652

static u64 get_error_address(struct amd64_pvt *pvt, struct mce *m)

drivers/edac/amd64_edac.c

2754

static inline void decode_bus_error(int node_id, struct mce *m)

drivers/edac/amd64_edac.c

2802

static void umc_get_err_info(struct mce *m, struct err_info *err)

drivers/edac/amd64_edac.c

2808

static void decode_umc_error(int node_id, struct mce *m)

drivers/edac/amd64_edac.c

3517

static void gpu_get_err_info(struct mce *m, struct err_info *err)

drivers/edac/amd64_edac.h

470

void (*get_err_info)(struct mce *m, struct err_info *err);

drivers/edac/i10nm_base.c

559

static bool i10nm_mc_decode_available(struct mce *mce)

drivers/edac/i10nm_base.c

567

if ((mce->status & (MCI_STATUS_MISCV | MCI_STATUS_ADDRV))

drivers/edac/i10nm_base.c

571

bank = mce->bank;

drivers/edac/i10nm_base.c

588

if (MCI_MISC_ECC_MODE(mce->misc) == MCI_MISC_ECC_DDRT)

drivers/edac/i10nm_base.c

591

if (i10nm_mscod_is_ddrt(MCI_STATUS_MSCOD(mce->status)))

drivers/edac/i10nm_base.c

599

struct mce *m = res->mce;

drivers/edac/i7core_edac.c

1693

const struct mce *m)

drivers/edac/i7core_edac.c

1789

static void i7core_check_error(struct mem_ctl_info *mci, struct mce *m)

drivers/edac/i7core_edac.c

1811

struct mce *mce = (struct mce *)data;

drivers/edac/i7core_edac.c

1815

i7_dev = get_i7core_dev(mce->socketid);

drivers/edac/i7core_edac.c

1816

if (!i7_dev || (mce->kflags & MCE_HANDLED_CEC))

drivers/edac/i7core_edac.c

1825

if (((mce->status & 0xffff) >> 7) != 1)

drivers/edac/i7core_edac.c

1829

if (mce->bank != 8)

drivers/edac/i7core_edac.c

1832

i7core_check_error(mci, mce);

drivers/edac/i7core_edac.c

1835

mce->kflags |= MCE_HANDLED_EDAC;

drivers/edac/ie31200_edac.c

370

static void __ie31200_check(struct mem_ctl_info *mci, struct mce *mce)

drivers/edac/ie31200_edac.c

374

info.erraddr = mce ? mce->addr : 0;

drivers/edac/ie31200_edac.c

534

static void mce_check(struct mce *mce)

drivers/edac/ie31200_edac.c

544

__ie31200_check(priv->mci, mce);

drivers/edac/ie31200_edac.c

550

struct mce *mce = (struct mce *)data;

drivers/edac/ie31200_edac.c

553

if (mce->kflags & MCE_HANDLED_CEC)

drivers/edac/ie31200_edac.c

560

if ((mce->status & 0xefff) >> 7 != 1)

drivers/edac/ie31200_edac.c

563

type = mce->mcgstatus & MCG_STATUS_MCIP ? "Exception" : "Event";

drivers/edac/ie31200_edac.c

566

mce->extcpu, type, mce->mcgstatus,

drivers/edac/ie31200_edac.c

567

mce->bank, mce->status);

drivers/edac/ie31200_edac.c

568

edac_dbg(0, "TSC 0x%llx\n", mce->tsc);

drivers/edac/ie31200_edac.c

569

edac_dbg(0, "ADDR 0x%llx\n", mce->addr);

drivers/edac/ie31200_edac.c

570

edac_dbg(0, "MISC 0x%llx\n", mce->misc);

drivers/edac/ie31200_edac.c

572

mce->cpuvendor, mce->cpuid, mce->time,

drivers/edac/ie31200_edac.c

573

mce->socketid, mce->apicid);

drivers/edac/ie31200_edac.c

575

mce_check(mce);

drivers/edac/ie31200_edac.c

576

mce->kflags |= MCE_HANDLED_EDAC;

drivers/edac/igen6_edac.c

1029

struct mce *mce = (struct mce *)data;

drivers/edac/igen6_edac.c

1032

if (mce->kflags & MCE_HANDLED_CEC)

drivers/edac/igen6_edac.c

1040

if ((mce->status & 0xefff) >> 7 != 1)

drivers/edac/igen6_edac.c

1043

if (mce->mcgstatus & MCG_STATUS_MCIP)

drivers/edac/igen6_edac.c

1049

mce->extcpu, type, mce->mcgstatus,

drivers/edac/igen6_edac.c

1050

mce->bank, mce->status);

drivers/edac/igen6_edac.c

1051

edac_dbg(0, "TSC 0x%llx\n", mce->tsc);

drivers/edac/igen6_edac.c

1052

edac_dbg(0, "ADDR 0x%llx\n", mce->addr);

drivers/edac/igen6_edac.c

1053

edac_dbg(0, "MISC 0x%llx\n", mce->misc);

drivers/edac/igen6_edac.c

1055

mce->cpuvendor, mce->cpuid, mce->time,

drivers/edac/igen6_edac.c

1056

mce->socketid, mce->apicid);

drivers/edac/igen6_edac.c

1067

mce->kflags |= MCE_HANDLED_EDAC;

drivers/edac/mce_amd.c

14

static void (*decode_dram_ecc)(int node_id, struct mce *m);

drivers/edac/mce_amd.c

16

void amd_register_ecc_decoder(void (*f)(int, struct mce *))

drivers/edac/mce_amd.c

22

void amd_unregister_ecc_decoder(void (*f)(int, struct mce *))

drivers/edac/mce_amd.c

289

static void decode_mc0_mce(struct mce *m)

drivers/edac/mce_amd.c

399

static void decode_mc1_mce(struct mce *m)

drivers/edac/mce_amd.c

545

static void decode_mc2_mce(struct mce *m)

drivers/edac/mce_amd.c

556

static void decode_mc3_mce(struct mce *m)

drivers/edac/mce_amd.c

585

static void decode_mc4_mce(struct mce *m)

drivers/edac/mce_amd.c

643

static void decode_mc5_mce(struct mce *m)

drivers/edac/mce_amd.c

675

static void decode_mc6_mce(struct mce *m)

drivers/edac/mce_amd.c

733

static void decode_smca_error(struct mce *m)

drivers/edac/mce_amd.c

777

static const char *decode_error_status(struct mce *m)

drivers/edac/mce_amd.c

796

struct mce *m = (struct mce *)data;

drivers/edac/mce_amd.h

79

void amd_register_ecc_decoder(void (*f)(int, struct mce *));

drivers/edac/mce_amd.h

80

void amd_unregister_ecc_decoder(void (*f)(int, struct mce *));

drivers/edac/pnd2_edac.c

1122

static void pnd2_mce_output_error(struct mem_ctl_info *mci, const struct mce *m,

drivers/edac/pnd2_edac.c

1369

struct mce *mce = (struct mce *)data;

drivers/edac/pnd2_edac.c

1375

if (!mci || (mce->kflags & MCE_HANDLED_CEC))

drivers/edac/pnd2_edac.c

1384

if ((mce->status & 0xefff) >> 7 != 1)

drivers/edac/pnd2_edac.c

1387

if (mce->mcgstatus & MCG_STATUS_MCIP)

drivers/edac/pnd2_edac.c

1394

mce->extcpu, type, mce->mcgstatus, mce->bank, mce->status);

drivers/edac/pnd2_edac.c

1395

pnd2_mc_printk(mci, KERN_INFO, "TSC %llx ", mce->tsc);

drivers/edac/pnd2_edac.c

1396

pnd2_mc_printk(mci, KERN_INFO, "ADDR %llx ", mce->addr);

drivers/edac/pnd2_edac.c

1397

pnd2_mc_printk(mci, KERN_INFO, "MISC %llx ", mce->misc);

drivers/edac/pnd2_edac.c

1399

mce->cpuvendor, mce->cpuid, mce->time, mce->socketid, mce->apicid);

drivers/edac/pnd2_edac.c

1401

pnd2_mce_output_error(mci, mce, &daddr);

drivers/edac/pnd2_edac.c

1404

mce->kflags |= MCE_HANDLED_EDAC;

drivers/edac/pnd2_edac.c

1430

struct mce m;

drivers/edac/sb_edac.c

2370

const struct mce *m, u8 *socket,

drivers/edac/sb_edac.c

3078

const struct mce *m)

drivers/edac/sb_edac.c

3258

struct mce *mce = (struct mce *)data;

drivers/edac/sb_edac.c

3262

if (mce->kflags & MCE_HANDLED_CEC)

drivers/edac/sb_edac.c

3271

if ((mce->status & 0xefff) >> 7 != 1)

drivers/edac/sb_edac.c

3275

if (!GET_BITFIELD(mce->status, 58, 58))

drivers/edac/sb_edac.c

3279

if (!GET_BITFIELD(mce->status, 59, 59))

drivers/edac/sb_edac.c

3283

if (GET_BITFIELD(mce->misc, 6, 8) != 2)

drivers/edac/sb_edac.c

3286

mci = get_mci_for_node_id(mce->socketid, IMC0);

drivers/edac/sb_edac.c

3290

if (mce->mcgstatus & MCG_STATUS_MCIP)

drivers/edac/sb_edac.c

3298

"Bank %d: %016Lx\n", mce->extcpu, type,

drivers/edac/sb_edac.c

3299

mce->mcgstatus, mce->bank, mce->status);

drivers/edac/sb_edac.c

3300

sbridge_mc_printk(mci, KERN_DEBUG, "TSC %llx ", mce->tsc);

drivers/edac/sb_edac.c

3301

sbridge_mc_printk(mci, KERN_DEBUG, "ADDR %llx ", mce->addr);

drivers/edac/sb_edac.c

3302

sbridge_mc_printk(mci, KERN_DEBUG, "MISC %llx ", mce->misc);

drivers/edac/sb_edac.c

3305

"%u APIC %x\n", mce->cpuvendor, mce->cpuid,

drivers/edac/sb_edac.c

3306

mce->time, mce->socketid, mce->apicid);

drivers/edac/sb_edac.c

3308

sbridge_mce_output_error(mci, mce);

drivers/edac/sb_edac.c

3311

mce->kflags |= MCE_HANDLED_EDAC;

drivers/edac/skx_common.c

651

const struct mce *m,

drivers/edac/skx_common.c

729

static enum error_source skx_error_source(const struct mce *m)

drivers/edac/skx_common.c

748

struct mce *mce = (struct mce *)data;

drivers/edac/skx_common.c

754

if (mce->kflags & MCE_HANDLED_CEC)

drivers/edac/skx_common.c

757

err_src = skx_error_source(mce);

drivers/edac/skx_common.c

760

if (err_src == ERR_SRC_NOT_MEMORY || !(mce->status & MCI_STATUS_ADDRV))

drivers/edac/skx_common.c

764

res.mce = mce;

drivers/edac/skx_common.c

765

res.addr = mce->addr & MCI_ADDR_PHYSADDR;

drivers/edac/skx_common.c

767

pr_err("Invalid address 0x%llx in IA32_MC%d_ADDR\n", mce->addr, mce->bank);

drivers/edac/skx_common.c

783

if (mce->mcgstatus & MCG_STATUS_MCIP)

drivers/edac/skx_common.c

791

"Bank %d: 0x%llx\n", mce->extcpu, type,

drivers/edac/skx_common.c

792

mce->mcgstatus, mce->bank, mce->status);

drivers/edac/skx_common.c

793

skx_mc_printk(mci, KERN_DEBUG, "TSC 0x%llx ", mce->tsc);

drivers/edac/skx_common.c

794

skx_mc_printk(mci, KERN_DEBUG, "ADDR 0x%llx ", mce->addr);

drivers/edac/skx_common.c

795

skx_mc_printk(mci, KERN_DEBUG, "MISC 0x%llx ", mce->misc);

drivers/edac/skx_common.c

798

"%u APIC 0x%x\n", mce->cpuvendor, mce->cpuid,

drivers/edac/skx_common.c

799

mce->time, mce->socketid, mce->apicid);

drivers/edac/skx_common.c

801

skx_mce_output_error(mci, mce, &res);

drivers/edac/skx_common.c

803

mce->kflags |= MCE_HANDLED_EDAC;

drivers/edac/skx_common.c

859

struct mce m;

drivers/edac/skx_common.h

225

struct mce *mce;

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

4932

struct mce *m = (struct mce *)data;

drivers/media/platform/nvidia/tegra-vde/h264.c

283

tegra_vde_set_bits(vde, 0x0A00, vde->mce, 0x08);

drivers/media/platform/nvidia/tegra-vde/h264.c

297

tegra_vde_writel(vde, 0x063C063C, vde->mce, 0x10);

drivers/media/platform/nvidia/tegra-vde/vde.c

255

vde->mce = devm_platform_ioremap_resource_byname(pdev, "mce");

drivers/media/platform/nvidia/tegra-vde/vde.c

256

if (IS_ERR(vde->mce))

drivers/media/platform/nvidia/tegra-vde/vde.c

257

return PTR_ERR(vde->mce);

drivers/media/platform/nvidia/tegra-vde/vde.h

220

if (vde->mce == base)

drivers/media/platform/nvidia/tegra-vde/vde.h

99

void __iomem *mce;

drivers/net/ethernet/marvell/octeontx2/af/mbox.h

1011

struct nix_rx_mce_s mce;

drivers/net/ethernet/marvell/octeontx2/af/mbox.h

1027

struct nix_rx_mce_s mce;

drivers/net/ethernet/marvell/octeontx2/af/mbox.h

1047

struct nix_rx_mce_s mce;

drivers/net/ethernet/marvell/octeontx2/af/mbox.h

1063

struct nix_rx_mce_s mce;

drivers/net/ethernet/marvell/octeontx2/af/mbox.h

1083

struct nix_rx_mce_s mce;

drivers/net/ethernet/marvell/octeontx2/af/mbox.h

991

struct nix_rx_mce_s mce;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1185

memcpy(ctx, &req->mce, NIX_MAX_CTX_SIZE);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1263

memcpy(&rsp->mce, ctx,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3177

int mce, u8 op, u16 pcifunc, int next,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3186

aq_req.qidx = mce;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3189

aq_req.mce.op = mce_op;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3190

aq_req.mce.index = index;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3191

aq_req.mce.eol = eol;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3192

aq_req.mce.pf_func = pcifunc;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3193

aq_req.mce.next = next;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3211

struct mce *mce;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3214

hlist_for_each_entry_safe(mce, tmp, &mce_list->head, node) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3215

hlist_del(&mce->node);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3216

kfree(mce);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3234

struct mce *mce, *prev_mce;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3239

hlist_for_each_entry(mce, &mce_list->head, node) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3243

if (!mce->is_active) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3246

prev_mce = mce;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3265

mce->pcifunc, next_idx,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3266

mce->rq_rss_index, mce->dest_type,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3272

prev_mce = mce;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3284

struct mce *mce, *prev_mce;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3291

hlist_for_each_entry(mce, &mce_list->head, node) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3295

if (!mce->is_active) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3298

prev_mce = mce;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3316

regval = (next_idx << 16) | (eol << 12) | mce->channel;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3321

prev_mce = mce;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3332

struct mce *mce;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3339

hlist_for_each_entry(mce, &mce_list->head, node) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3341

if (mce->pcifunc == req->pcifunc[i]) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3342

hlist_del(&mce->node);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3343

kfree(mce);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3371

struct mce *mce;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3376

mce = kzalloc_obj(*mce);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3377

if (!mce)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3380

mce->pcifunc = req->pcifunc[i];

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3381

mce->channel = req->channel[i];

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3382

mce->rq_rss_index = req->rq_rss_index[i];

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3383

mce->dest_type = req->dest_type[i];

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3384

mce->is_active = 1;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3385

hlist_add_head(&mce->node, &mce_list->head);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3399

hlist_for_each_entry_safe(mce, tmp, &mce_list->head, node) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3400

hlist_del(&mce->node);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3401

kfree(mce);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3411

struct mce *mce, *tail = NULL;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3415

hlist_for_each_entry(mce, &mce_list->head, node) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3417

if (mce->pcifunc == pcifunc && !add) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3420

} else if (mce->pcifunc == pcifunc && add) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3424

tail = mce;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3428

hlist_del(&mce->node);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3429

kfree(mce);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3438

mce = kzalloc_obj(*mce);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3439

if (!mce)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3441

mce->pcifunc = pcifunc;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3443

hlist_add_head(&mce->node, &mce_list->head);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3445

hlist_add_behind(&mce->node, &tail->node);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3458

struct mce *mce;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3495

hlist_for_each_entry(mce, &mce_list->head, node) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3502

mce->pcifunc, next_idx,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5222

struct mce *mce;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5228

hlist_for_each_entry(mce, &mce_list->head, node) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5229

if (mce->pcifunc == pcifunc) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5230

mce->is_active = is_active;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6350

struct mce *mce;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6368

hlist_for_each_entry_safe(mce, tmp, &mce_list->head, node) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6369

if (mce->pcifunc == pcifunc) {

drivers/ras/amd/fmpm.c

347

static void update_fru_record(struct fru_rec *rec, struct mce *m)

drivers/ras/amd/fmpm.c

410

struct mce *m = (struct mce *)data;

drivers/ras/cec.c

537

struct mce *m = (struct mce *)data;

drivers/xen/mcelog.c

194

static void xen_mce_log(struct xen_mce *mce)

drivers/xen/mcelog.c

211

memcpy(xen_mcelog.entry + entry, mce, sizeof(struct xen_mce));

include/trace/events/mce.h

3

#define TRACE_SYSTEM mce

lib/zstd/common/cpu.h

137

D(mce, 7)

tools/testing/selftests/kvm/x86/ucna_injection_test.c

157

struct kvm_x86_mce mce = {};

tools/testing/selftests/kvm/x86/ucna_injection_test.c

158

mce.status = status;

tools/testing/selftests/kvm/x86/ucna_injection_test.c

159

mce.mcg_status = 0;

tools/testing/selftests/kvm/x86/ucna_injection_test.c

165

mce.misc = (MCM_ADDR_PHYS << 6) | 0xc;

tools/testing/selftests/kvm/x86/ucna_injection_test.c

166

mce.addr = addr;

tools/testing/selftests/kvm/x86/ucna_injection_test.c

167

mce.bank = UCNA_BANK;

tools/testing/selftests/kvm/x86/ucna_injection_test.c

169

vcpu_ioctl(vcpu, KVM_X86_SET_MCE, &mce);