CLK_PLL1D2
DEF_DIV6P1("csi0", R8A774C0_CLK_CSI0, CLK_PLL1D2, 0x00c),
DEF_DIV6P1("mso", R8A774C0_CLK_MSO, CLK_PLL1D2, 0x014),
DEF_FIXED(".pll1d2", CLK_PLL1D2, CLK_PLL1, 2, 1),
DEF_FIXED("cr", R8A77990_CLK_CR, CLK_PLL1D2, 2, 1),
DEF_DIV6P1("csi0", R8A77990_CLK_CSI0, CLK_PLL1D2, 0x00c),
DEF_DIV6P1("mso", R8A77990_CLK_MSO, CLK_PLL1D2, 0x014),
DEF_FIXED(".pll1d2", CLK_PLL1D2, CLK_PLL1, 2, 1),
DEF_DIV6P1("mso", R8A77995_CLK_MSO, CLK_PLL1D2, 0x014),
DEF_FIXED(".pll1d2", CLK_PLL1D2, CLK_PLL1, 2, 1),
DEF_FIXED("cr", R8A77995_CLK_CR, CLK_PLL1D2, 2, 1),