drivers/clk/aspeed/clk-ast2700.c

369

PLL_CLK(SCU0_CLK_DPLL, CLK_PLL, "soc0-dpll", SCU0_CLKIN, SCU0_DPLL_PARAM),

drivers/clk/aspeed/clk-ast2700.c

370

PLL_CLK(SCU0_CLK_MPLL, CLK_PLL, "soc0-mpll", SCU0_CLKIN, SCU0_MPLL_PARAM),

drivers/clk/aspeed/clk-ast2700.c

458

PLL_CLK(SCU1_CLK_HPLL, CLK_PLL, "soc1-hpll", SCU1_CLKIN, SCU1_HPLL_PARAM),

drivers/clk/aspeed/clk-ast2700.c

459

PLL_CLK(SCU1_CLK_APLL, CLK_PLL, "soc1-apll", SCU1_CLKIN, SCU1_APLL_PARAM),

drivers/clk/aspeed/clk-ast2700.c

460

PLL_CLK(SCU1_CLK_DPLL, CLK_PLL, "soc1-dpll", SCU1_CLKIN, SCU1_DPLL_PARAM),

drivers/clk/aspeed/clk-ast2700.c

949

} else if (clk->type == CLK_PLL) {

drivers/clk/clk-bm1880.c

206

CLK_PLL(BM1880_CLK_MPLL, "clk_mpll", bm1880_pll_parent,

drivers/clk/clk-bm1880.c

208

CLK_PLL(BM1880_CLK_SPLL, "clk_spll", bm1880_pll_parent,

drivers/clk/clk-bm1880.c

210

CLK_PLL(BM1880_CLK_FPLL, "clk_fpll", bm1880_pll_parent,

drivers/clk/clk-bm1880.c

212

CLK_PLL(BM1880_CLK_DDRPLL, "clk_ddrpll", bm1880_pll_parent,

drivers/clk/clk-loongson2.c

142

CLK_PLL(LS2K0300_NODE_PLL, "pll_node", 0x00, 15, 9, 8, 7),

drivers/clk/clk-loongson2.c

143

CLK_PLL(LS2K0300_DDR_PLL, "pll_ddr", 0x08, 15, 9, 8, 7),

drivers/clk/clk-loongson2.c

144

CLK_PLL(LS2K0300_PIX_PLL, "pll_pix", 0x10, 15, 9, 8, 7),

drivers/clk/clk-loongson2.c

186

CLK_PLL(LOONGSON2_NODE_PLL, "pll_node", 0, 16, 8, 8, 6),

drivers/clk/clk-loongson2.c

187

CLK_PLL(LOONGSON2_DDR_PLL, "pll_ddr", 0x8, 16, 8, 8, 6),

drivers/clk/clk-loongson2.c

188

CLK_PLL(LOONGSON2_DC_PLL, "pll_soc", 0x10, 16, 8, 8, 6),

drivers/clk/clk-loongson2.c

189

CLK_PLL(LOONGSON2_PIX0_PLL, "pll_pix0", 0x18, 16, 8, 8, 6),

drivers/clk/clk-loongson2.c

190

CLK_PLL(LOONGSON2_PIX1_PLL, "pll_pix1", 0x20, 16, 8, 8, 6),

drivers/clk/clk-loongson2.c

207

CLK_PLL(LOONGSON2_NODE_PLL, "pll_node", 0, 32, 10, 26, 6),

drivers/clk/clk-loongson2.c

208

CLK_PLL(LOONGSON2_DDR_PLL, "pll_ddr", 0x10, 32, 10, 26, 6),

drivers/clk/clk-loongson2.c

209

CLK_PLL(LOONGSON2_DC_PLL, "pll_dc", 0x20, 32, 10, 26, 6),

drivers/clk/clk-loongson2.c

210

CLK_PLL(LOONGSON2_PIX0_PLL, "pll_pix0", 0x30, 32, 10, 26, 6),

drivers/clk/clk-loongson2.c

211

CLK_PLL(LOONGSON2_PIX1_PLL, "pll_pix1", 0x40, 32, 10, 26, 6),

drivers/clk/clk-loongson2.c

234

CLK_PLL(LOONGSON2_DC_PLL, "pll_0", 0, 21, 9, 32, 6),

drivers/clk/clk-loongson2.c

235

CLK_PLL(LOONGSON2_DDR_PLL, "pll_1", 0x10, 21, 9, 32, 6),

drivers/clk/clk-loongson2.c

236

CLK_PLL(LOONGSON2_NODE_PLL, "pll_2", 0x20, 21, 9, 32, 6),

drivers/clk/clk-loongson2.c

237

CLK_PLL(LOONGSON2_PIX0_PLL, "pll_pix0", 0x30, 21, 9, 32, 6),

drivers/clk/clk-loongson2.c

238

CLK_PLL(LOONGSON2_PIX1_PLL, "pll_pix1", 0x40, 21, 9, 32, 6),

drivers/clk/microchip/clk-mpfs.c

176

CLK_PLL(CLK_MSSPLL_INTERNAL, "clk_msspll_internal", mpfs_ext_ref, MSSPLL_FBDIV_SHIFT,

drivers/clk/renesas/r7s9210-cpg-mssr.c

63

DEF_BASE(".pll", CLK_PLL, CLK_TYPE_RZA_PLL, CLK_MAIN),

drivers/clk/renesas/r7s9210-cpg-mssr.c

66

DEF_FIXED("p1c", R7S9210_CLK_P1C, CLK_PLL, 16, 1),

drivers/clk/renesas/r7s9210-cpg-mssr.c

77

DEF_FIXED("i", R7S9210_CLK_I, CLK_PLL, 2, 1),

drivers/clk/renesas/r7s9210-cpg-mssr.c

78

DEF_FIXED("g", R7S9210_CLK_G, CLK_PLL, 4, 1),

drivers/clk/renesas/r7s9210-cpg-mssr.c

79

DEF_FIXED("b", R7S9210_CLK_B, CLK_PLL, 8, 1),

drivers/clk/renesas/r7s9210-cpg-mssr.c

80

DEF_FIXED("p1", R7S9210_CLK_P1, CLK_PLL, 16, 1),

drivers/clk/renesas/r7s9210-cpg-mssr.c

81

DEF_FIXED("p0", R7S9210_CLK_P0, CLK_PLL, 32, 1),