Symbol: CLK_PHASE_SEL_CH1
sound/soc/mediatek/mt8188/mt8188-dai-dmic.c
26
#define CLK_PHASE_SEL_CH2 ((CLK_PHASE_SEL_CH1) + 4)
sound/soc/mediatek/mt8188/mt8188-dai-dmic.c
401
u32 val = AFE_DMIC_UL_SRC_CON0_UL_PHASE_SEL_CH1(CLK_PHASE_SEL_CH1) |