CLK_PERI_UART1
GATE_PERI0(CLK_PERI_UART1, "uart1_ck", "axi_sel", 20),
GATE_PERI0(CLK_PERI_UART1, "per_uart1", "uart_sel", 21),
GATE_MTK(CLK_PERI_UART1, "uart1", "uart_sel", &peri_cg_regs, 18, &mtk_clk_gate_ops_setclr),
GATE_PERI(CLK_PERI_UART1, "peri_uart1", "axi_sel", 20),
GATE_PERI0(CLK_PERI_UART1, "uart1_ck", "axi_sel", 23),
GATE_PERI0(CLK_PERI_UART1, "peri_uart1", "axi_sel", 20),