CLK_PERI_PWM
GATE_PERI0(CLK_PERI_PWM, "pwm_ck", "axi_sel", 9),
GATE_PERI0(CLK_PERI_PWM, "per_pwm", "pwm_sel", 10),
GATE_MTK(CLK_PERI_PWM, "pwm", "axi_sel", &peri_cg_regs, 9, &mtk_clk_gate_ops_setclr),
GATE_PERI(CLK_PERI_PWM, "peri_pwm", "axi_sel", 9),
GATE_PERI0(CLK_PERI_PWM, "pwm_ck", "axi_sel", 9),
GATE_PERI0(CLK_PERI_PWM, "peri_pwm", "axi_sel", 9),